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Searched refs:CLK_TOP_ATB_SEL (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dmt7629-clk.h103 #define CLK_TOP_ATB_SEL 93 macro
Dmt7622-clk.h88 #define CLK_TOP_ATB_SEL 76 macro
Dmt6765-clk.h136 #define CLK_TOP_ATB_SEL 101 macro
Dmt8173-clk.h114 #define CLK_TOP_ATB_SEL 104 macro
Dmt2712-clk.h151 #define CLK_TOP_ATB_SEL 120 macro
Dmt8192-clk.h42 #define CLK_TOP_ATB_SEL 30 macro
/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt7629.c533 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
Dclk-mt7622.c566 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
Dclk-mt2712.c786 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel",
Dclk-mt6765.c384 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, CLK_CFG_1,
Dclk-mt8173.c570 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23),
Dclk-mt8192.c779 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel",