Searched refs:CLK_TOP_ATB_SEL (Results 1 – 12 of 12) sorted by relevance
/linux-5.19.10/include/dt-bindings/clock/ |
D | mt7629-clk.h | 103 #define CLK_TOP_ATB_SEL 93 macro
|
D | mt7622-clk.h | 88 #define CLK_TOP_ATB_SEL 76 macro
|
D | mt6765-clk.h | 136 #define CLK_TOP_ATB_SEL 101 macro
|
D | mt8173-clk.h | 114 #define CLK_TOP_ATB_SEL 104 macro
|
D | mt2712-clk.h | 151 #define CLK_TOP_ATB_SEL 120 macro
|
D | mt8192-clk.h | 42 #define CLK_TOP_ATB_SEL 30 macro
|
/linux-5.19.10/drivers/clk/mediatek/ |
D | clk-mt7629.c | 533 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
|
D | clk-mt7622.c | 566 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
|
D | clk-mt2712.c | 786 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel",
|
D | clk-mt6765.c | 384 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, CLK_CFG_1,
|
D | clk-mt8173.c | 570 MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents, 0x0090, 16, 2, 23),
|
D | clk-mt8192.c | 779 MUX_GATE_CLR_SET_UPD(CLK_TOP_ATB_SEL, "atb_sel",
|