Searched refs:CLK_SYSREG (Results 1 – 8 of 8) sorted by relevance
/linux-5.19.10/include/dt-bindings/clock/ |
D | exynos5250.h | 123 #define CLK_SYSREG 319 macro
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D | exynos4.h | 180 #define CLK_SYSREG 342 macro
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D | exynos5420.h | 95 #define CLK_SYSREG 302 macro
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D | exynos3250.h | 164 #define CLK_SYSREG 158 macro
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/linux-5.19.10/drivers/clk/samsung/ |
D | clk-exynos4.c | 931 GATE(CLK_SYSREG, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, 973 GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
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D | clk-exynos5250.c | 604 GATE(CLK_SYSREG, "sysreg", "div_aclk66",
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D | clk-exynos3250.c | 499 GATE(CLK_SYSREG, "sysreg", "div_aclk_100", GATE_IP_PERIR, 1,
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D | clk-exynos5420.c | 1110 GATE(CLK_SYSREG, "sysreg", "aclk66_psgen",
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