Searched refs:CLK_SCLK_SPI0 (Results 1 – 19 of 19) sorted by relevance
/linux-5.19.10/arch/arm/boot/dts/ |
D | exynos3250-artik5-eval.dts | 46 <&cmu CLK_DIV_SPI0_PRE>, <&cmu CLK_SCLK_SPI0>; 50 <&cmu CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */
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D | exynos3250.dtsi | 652 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
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D | exynos4.dtsi | 621 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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D | exynos5250.dtsi | 504 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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D | exynos5420.dtsi | 551 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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/linux-5.19.10/include/dt-bindings/clock/ |
D | exynos5250.h | 51 #define CLK_SCLK_SPI0 154 macro
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D | exynos7-clk.h | 41 #define CLK_SCLK_SPI0 7 macro
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D | exynos4.h | 72 #define CLK_SCLK_SPI0 159 macro
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D | exynos5420.h | 36 #define CLK_SCLK_SPI0 135 macro
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D | exynos3250.h | 253 #define CLK_SCLK_SPI0 245 macro
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D | exynos5433.h | 434 #define CLK_SCLK_SPI0 33 macro
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/linux-5.19.10/drivers/clk/samsung/ |
D | clk-exynos5250.c | 508 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0",
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D | clk-exynos3250.c | 560 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi0_pre",
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D | clk-exynos7.c | 352 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",
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D | clk-exynos4.c | 789 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0", SRC_MASK_PERIL1, 16,
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D | clk-exynos5420.c | 987 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre",
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D | clk-exynos5433.c | 1715 GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
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/linux-5.19.10/arch/arm64/boot/dts/exynos/ |
D | exynos7.dtsi | 223 <&clock_top0 CLK_SCLK_SPI0>,
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D | exynos5433.dtsi | 1463 <&cmu_peric CLK_SCLK_SPI0>,
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