Searched refs:CLK_SCLK_MMC1 (Results 1 – 21 of 21) sorted by relevance
| /linux-5.19.10/include/dt-bindings/clock/ |
| D | exynos5410.h | 27 #define CLK_SCLK_MMC1 133 macro
|
| D | exynos5250.h | 37 #define CLK_SCLK_MMC1 140 macro
|
| D | exynos7-clk.h | 60 #define CLK_SCLK_MMC1 7 macro
|
| D | exynos4.h | 59 #define CLK_SCLK_MMC1 146 macro
|
| D | exynos5420.h | 34 #define CLK_SCLK_MMC1 133 macro
|
| D | exynos3250.h | 248 #define CLK_SCLK_MMC1 240 macro
|
| D | exynos5433.h | 569 #define CLK_SCLK_MMC1 62 macro
|
| /linux-5.19.10/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 174 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1",
|
| D | clk-exynos5250.c | 477 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1",
|
| D | clk-exynos3250.c | 548 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc1_pre",
|
| D | clk-exynos7.c | 532 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_sclk_mmc1",
|
| D | clk-exynos4.c | 769 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1", SRC_MASK_FSYS, 4,
|
| D | clk-exynos5420.c | 1008 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_mmc1",
|
| D | clk-exynos5433.c | 2317 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "mout_sclk_mmc1_user",
|
| /linux-5.19.10/arch/arm/boot/dts/ |
| D | exynos5410.dtsi | 144 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
|
| D | exynos3250.dtsi | 395 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
|
| D | exynos4.dtsi | 332 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
|
| D | exynos5250.dtsi | 558 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
|
| D | exynos5420.dtsi | 222 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
|
| /linux-5.19.10/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 591 <&clock_top1 CLK_SCLK_MMC1>;
|
| D | exynos5433.dtsi | 1843 <&cmu_fsys CLK_SCLK_MMC1>;
|