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Searched refs:CLK_SCLK_BUS_PLL (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/Documentation/devicetree/bindings/clock/
Dsamsung,exynos5433-clock.yaml523 <&cmu_mif CLK_SCLK_BUS_PLL>;
/linux-5.19.10/include/dt-bindings/clock/
Dexynos5433.h395 #define CLK_SCLK_BUS_PLL 198 macro
/linux-5.19.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi384 <&cmu_mif CLK_SCLK_BUS_PLL>;
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos5433.c1515 GATE(CLK_SCLK_BUS_PLL, "sclk_bus_pll", "mout_bus_pll_div2",