Searched refs:CLK_PLL2_FIN (Results 1 – 2 of 2) sorted by relevance
2567 #define CLK_PLL2_FIN 48000000 macro2723 CLK_PLL2_FIN); in rt5682_wclk_set_rate()2725 if (parent_rate != CLK_PLL2_FIN) in rt5682_wclk_set_rate()2727 clk_name, CLK_PLL2_FIN); in rt5682_wclk_set_rate()2735 CLK_PLL2_FIN, clk_pll2_out); in rt5682_wclk_set_rate()
2449 #define CLK_PLL2_FIN 48000000 macro2590 CLK_PLL2_FIN); in rt5682s_wclk_set_rate()2592 if (parent_rate != CLK_PLL2_FIN) in rt5682s_wclk_set_rate()2594 clk_name, CLK_PLL2_FIN); in rt5682s_wclk_set_rate()2602 CLK_PLL2_FIN, clk_pll2_fout); in rt5682s_wclk_set_rate()