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Searched refs:CLK_PERI_UART2_SEL (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dmt8135-clk.h182 #define CLK_PERI_UART2_SEL 44 macro
Dmt8173-clk.h231 #define CLK_PERI_UART2_SEL 38 macro
Dmt2701-clk.h270 #define CLK_PERI_UART2_SEL 47 macro
/linux-5.19.10/arch/arm/boot/dts/
Dmt8135.dtsi245 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
Dmt2701.dtsi280 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
Dmt7623.dtsi403 clocks = <&pericfg CLK_PERI_UART2_SEL>,
/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt8135.c513 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
Dclk-mt2701.c883 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents,
Dclk-mt8173.c728 MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1),
/linux-5.19.10/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi700 clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;