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Searched refs:CLK_PERI_PWM7 (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dmt8135-clk.h162 #define CLK_PERI_PWM7 24 macro
Dmt8173-clk.h202 #define CLK_PERI_PWM7 9 macro
Dmt2712-clk.h248 #define CLK_PERI_PWM7 9 macro
Dmt2701-clk.h230 #define CLK_PERI_PWM7 9 macro
/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt8135.c484 GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axi_sel", 8),
Dclk-mt2701.c849 GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axisel_d4", 8),
Dclk-mt2712.c1085 GATE_PERI0(CLK_PERI_PWM7, "per_pwm7",
Dclk-mt8173.c690 GATE_PERI0(CLK_PERI_PWM7, "peri_pwm7", "axi_sel", 8),
/linux-5.19.10/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi489 <&pericfg CLK_PERI_PWM7>;