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Searched refs:CLK_PERI_PWM1 (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dmt8135-clk.h168 #define CLK_PERI_PWM1 30 macro
Dmt8173-clk.h196 #define CLK_PERI_PWM1 3 macro
Dmt2712-clk.h242 #define CLK_PERI_PWM1 3 macro
Dmt2701-clk.h224 #define CLK_PERI_PWM1 3 macro
/linux-5.19.10/Documentation/devicetree/bindings/pwm/
Dpwm-mediatek.txt40 <&pericfg CLK_PERI_PWM1>,
/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt8135.c490 GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axi_sel", 2),
Dclk-mt2701.c855 GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axisel_d4", 2),
Dclk-mt2712.c1073 GATE_PERI0(CLK_PERI_PWM1, "per_pwm1",
Dclk-mt8173.c684 GATE_PERI0(CLK_PERI_PWM1, "peri_pwm1", "axi_sel", 2),
/linux-5.19.10/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi483 <&pericfg CLK_PERI_PWM1>,
/linux-5.19.10/arch/arm/boot/dts/
Dmt7623.dtsi426 <&pericfg CLK_PERI_PWM1>,