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Searched refs:CLK_PCLK_CSIS0 (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos5433.h1272 #define CLK_PCLK_CSIS0 119 macro
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos5433.c5020 GATE(CLK_PCLK_CSIS0, "pclk_csis0", "div_aclk_cam0_200",