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Searched refs:CLK_MOUT_MEM1_PLL_DIV2 (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos5433.h217 #define CLK_MOUT_MEM1_PLL_DIV2 12 macro
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos5433.c1114 MUX(CLK_MOUT_MEM1_PLL_DIV2, "mout_mem1_pll_div2", mout_mem1_pll_div2_p,