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Searched refs:CLK_MOUT_BUS_PLL_DIV2 (Results 1 – 4 of 4) sorted by relevance

/linux-5.19.10/arch/arm64/boot/dts/exynos/
Dexynos5433-tm2e.dts47 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
Dexynos5433-tm2.dts48 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
/linux-5.19.10/include/dt-bindings/clock/
Dexynos5433.h216 #define CLK_MOUT_BUS_PLL_DIV2 11 macro
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos5433.c1112 MUX(CLK_MOUT_BUS_PLL_DIV2, "mout_bus_pll_div2", mout_bus_pll_div2_p,