Searched refs:CLK_MOUT_BPLL (Results 1 – 6 of 6) sorted by relevance
| /linux-5.19.10/include/dt-bindings/clock/ |
| D | exynos5420.h | 226 #define CLK_MOUT_BPLL 655 macro
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| D | exynos3250.h | 274 #define CLK_MOUT_BPLL 9 macro
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| /linux-5.19.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | samsung,exynos5422-dmc.yaml | 118 <&clock CLK_MOUT_BPLL>,
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| /linux-5.19.10/drivers/clk/samsung/ |
| D | clk-exynos5420.c | 737 MUX_F(CLK_MOUT_BPLL, "mout_bpll", mout_bpll_p, SRC_CDREX, 0, 1,
1674 clk_prepare_enable(hws[CLK_MOUT_BPLL]->clk); in exynos5x_clk_init()
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| D | clk-exynos3250.c | 887 MUX(CLK_MOUT_BPLL, "mout_bpll", mout_bpll_p, SRC_DMC, 10, 1),
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| /linux-5.19.10/arch/arm/boot/dts/ |
| D | exynos5420.dtsi | 247 <&clock CLK_MOUT_BPLL>,
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