Searched refs:CLK_MM_MDP_WROT0 (Results 1 – 14 of 14) sorted by relevance
| /linux-5.19.10/drivers/clk/mediatek/ |
| D | clk-mt6765-mm.c | 37 GATE_MM(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_ck", 5),
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| D | clk-mt8183-mm.c | 53 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 17),
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| D | clk-mt6779-mm.c | 53 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 17),
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| D | clk-mt6797-mm.c | 57 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 12),
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| D | clk-mt8173-mm.c | 59 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 12),
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| D | clk-mt2712-mm.c | 74 GATE_MM0(CLK_MM_MDP_WROT0, "mm_mdp_wrot0", "mm_sel", 12),
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| /linux-5.19.10/include/dt-bindings/clock/ |
| D | mt6797-clk.h | 227 #define CLK_MM_MDP_WROT0 13 macro
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| D | mt6765-clk.h | 256 #define CLK_MM_MDP_WROT0 5 macro
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| D | mt8173-clk.h | 259 #define CLK_MM_MDP_WROT0 12 macro
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| D | mt6779-clk.h | 358 #define CLK_MM_MDP_WROT0 18 macro
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| D | mt8183-clk.h | 326 #define CLK_MM_MDP_WROT0 17 macro
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| D | mt2712-clk.h | 313 #define CLK_MM_MDP_WROT0 12 macro
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| /linux-5.19.10/Documentation/devicetree/bindings/media/ |
| D | mediatek-mdp.txt | 84 clocks = <&mmsys CLK_MM_MDP_WROT0>;
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| /linux-5.19.10/arch/arm64/boot/dts/mediatek/ |
| D | mt8173.dtsi | 1057 clocks = <&mmsys CLK_MM_MDP_WROT0>;
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