Searched refs:CLK_MM_DISP_SPLIT0 (Results 1 – 6 of 6) sorted by relevance
63 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
75 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
90 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
275 #define CLK_MM_DISP_SPLIT0 28 macro
329 #define CLK_MM_DISP_SPLIT0 28 macro
1187 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;