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Searched refs:CLK_MM_DISP_PWM1_MM (Results 1 – 2 of 2) sorted by relevance

/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt2712-mm.c95 GATE_MM1(CLK_MM_DISP_PWM1_MM, "mm_pwm1_mm", "mm_sel", 2),
/linux-5.19.10/include/dt-bindings/clock/
Dmt2712-clk.h333 #define CLK_MM_DISP_PWM1_MM 32 macro