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Searched refs:CLK_MM_DISP_OVL1 (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/clk/mediatek/
Dclk-mt6797-mm.c61 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 16),
Dclk-mt8173-mm.c64 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 17),
Dclk-mt2712-mm.c79 GATE_MM0(CLK_MM_DISP_OVL1, "mm_disp_ovl1", "mm_sel", 17),
/linux-5.19.10/include/dt-bindings/clock/
Dmt6797-clk.h231 #define CLK_MM_DISP_OVL1 17 macro
Dmt8173-clk.h264 #define CLK_MM_DISP_OVL1 17 macro
Dmt2712-clk.h318 #define CLK_MM_DISP_OVL1 17 macro
/linux-5.19.10/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi1085 clocks = <&mmsys CLK_MM_DISP_OVL1>;