Searched refs:CLK_INFRA_M4U (Results 1 – 13 of 13) sorted by relevance
| /linux-5.19.10/include/dt-bindings/clock/ |
| D | mt8135-clk.h | 128 #define CLK_INFRA_M4U 7 macro
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| D | mt8173-clk.h | 181 #define CLK_INFRA_M4U 6 macro
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| D | mt2712-clk.h | 230 #define CLK_INFRA_M4U 2 macro
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| D | mt2701-clk.h | 205 #define CLK_INFRA_M4U 8 macro
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| /linux-5.19.10/drivers/clk/mediatek/ |
| D | clk-mt8135.c | 420 GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8),
555 clk_prepare_enable(clk_data->hws[CLK_INFRA_M4U]->clk); in mtk_infrasys_init()
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| D | clk-mt2701.c | 721 GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8),
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| D | clk-mt2712.c | 1013 GATE_INFRA(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
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| D | clk-mt8173.c | 638 GATE_ICG(CLK_INFRA_M4U, "infra_m4u", "mem_sel", 8),
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| /linux-5.19.10/arch/arm/boot/dts/ |
| D | mt7623n.dtsi | 108 clocks = <&infracfg CLK_INFRA_M4U>;
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| D | mt2701.dtsi | 223 clocks = <&infracfg CLK_INFRA_M4U>;
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| /linux-5.19.10/Documentation/devicetree/bindings/iommu/ |
| D | mediatek,iommu.yaml | 192 clocks = <&infracfg CLK_INFRA_M4U>;
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| /linux-5.19.10/arch/arm64/boot/dts/mediatek/ |
| D | mt2712e.dtsi | 330 clocks = <&infracfg CLK_INFRA_M4U>;
347 clocks = <&infracfg CLK_INFRA_M4U>;
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| D | mt8173.dtsi | 589 clocks = <&infracfg CLK_INFRA_M4U>;
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