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Searched refs:CLK_GOUT_UART0_PCLK (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos7885.h98 #define CLK_GOUT_UART0_PCLK 29 macro
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos7885.c445 GATE(CLK_GOUT_UART0_PCLK, "gout_uart0_pclk", "mout_peri_bus_user",
/linux-5.19.10/arch/arm64/boot/dts/exynos/
Dexynos7885.dtsi283 clocks = <&cmu_peri CLK_GOUT_UART0_PCLK>,