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Searched refs:CLK_FIMD1 (Results 1 – 9 of 9) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos5250.h143 #define CLK_FIMD1 339 macro
Dexynos4.h126 #define CLK_FIMD1 288 /* Exynos4210 only */ macro
Dexynos5420.h144 #define CLK_FIMD1 421 macro
/linux-5.19.10/arch/arm/boot/dts/
Dexynos5420.dtsi1054 clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
1065 clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
1223 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
Dexynos4210.dtsi213 clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
Dexynos5250.dtsi1076 clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
1135 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos5250.c653 GATE(CLK_FIMD1, "fimd1", "mout_aclk200_disp1_sub", GATE_IP_DISP1, 0, 0,
Dclk-exynos4.c721 GATE(CLK_FIMD1, "fimd1", "aclk160", E4210_GATE_IP_LCD1, 0, 0, 0),
Dclk-exynos5420.c1222 GATE(CLK_FIMD1, "fimd1", "aclk300_disp1", GATE_IP_DISP1, 0, 0, 0),