Home
last modified time | relevance | path

Searched refs:CLK_DIV_SCLK_AUD_UART (Results 1 – 3 of 3) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos5433.h786 #define CLK_DIV_SCLK_AUD_UART 9 macro
/linux-5.19.10/arch/arm64/boot/dts/exynos/
Dexynos5433-tm2-common.dtsi235 <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos5433.c2973 DIV(CLK_DIV_SCLK_AUD_UART, "div_sclk_aud_uart", "mout_aud_pll_user",