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Searched refs:CLK_DIV_GDL (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Dexynos4.h238 #define CLK_DIV_GDL 459 macro
Dexynos3250.h84 #define CLK_DIV_GDL 65 macro
/linux-5.19.10/Documentation/devicetree/bindings/devfreq/
Dexynos-bus.txt240 clocks = <&cmu CLK_DIV_GDL>;
452 clocks = <&clock CLK_DIV_GDL>;
/linux-5.19.10/arch/arm/boot/dts/
Dexynos4210.dtsi268 clocks = <&clock CLK_DIV_GDL>;
Dexynos4412.dtsi468 clocks = <&clock CLK_DIV_GDL>;
Dexynos3250.dtsi810 clocks = <&cmu CLK_DIV_GDL>;
/linux-5.19.10/drivers/clk/samsung/
Dclk-exynos3250.c337 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 4),
Dclk-exynos4.c590 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),