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Searched refs:CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT (Results 1 – 10 of 10) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_3_0_sh_mask.h365 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT 0x00000005 macro
Dbif_4_1_sh_mask.h236 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT 0x5 macro
Dbif_5_0_sh_mask.h274 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT 0x5 macro
Dbif_5_1_sh_mask.h238 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT 0x5 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/nbif/
Dnbif_6_1_sh_mask.h2291 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_4_sh_mask.h20341 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT … macro
Dnbio_4_3_0_sh_mask.h17334 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT … macro
Dnbio_2_3_sh_mask.h1571 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT … macro
Dnbio_7_0_sh_mask.h117766 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT … macro
Dnbio_6_1_sh_mask.h17490 #define CLKREQB_PAD_CNTL__CLKREQB_PAD_SN0__SHIFT … macro