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Searched refs:CLKID_VCLK2_DIV4 (Results 1 – 8 of 8) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/
Daxg-clkc.h94 #define CLKID_VCLK2_DIV4 129 macro
Dg12a-clkc.h120 #define CLKID_VCLK2_DIV4 155 macro
Dgxbb-clkc.h141 #define CLKID_VCLK2_DIV4 192 macro
/linux-5.19.10/drivers/clk/meson/
Dmeson8b.h140 #define CLKID_VCLK2_DIV4 155 macro
Dmeson8b.c2930 [CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
3138 [CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
3357 [CLKID_VCLK2_DIV4] = &meson8b_vclk2_div4_div_gate.hw,
Dgxbb.c2922 [CLKID_VCLK2_DIV4] = &gxbb_vclk2_div4.hw,
3133 [CLKID_VCLK2_DIV4] = &gxbb_vclk2_div4.hw,
Dg12a.c4404 [CLKID_VCLK2_DIV4] = &g12a_vclk2_div4.hw,
4633 [CLKID_VCLK2_DIV4] = &g12a_vclk2_div4.hw,
4897 [CLKID_VCLK2_DIV4] = &g12a_vclk2_div4.hw,
Daxg.c2023 [CLKID_VCLK2_DIV4] = &axg_vclk2_div4.hw,