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Searched refs:CLKID_FCLK_DIV5 (Results 1 – 11 of 11) sorted by relevance

/linux-5.19.10/include/dt-bindings/clock/ !
Daxg-clkc.h16 #define CLKID_FCLK_DIV5 5 macro
Dmeson8b-clkc.h15 #define CLKID_FCLK_DIV5 8 macro
Dg12a-clkc.h16 #define CLKID_FCLK_DIV5 5 macro
Dgxbb-clkc.h15 #define CLKID_FCLK_DIV5 7 macro
/linux-5.19.10/arch/arm64/boot/dts/amlogic/ !
Dmeson-sm1.dtsi163 <&clkc CLKID_FCLK_DIV5>;
/linux-5.19.10/arch/arm/boot/dts/ !
Dmeson8.dtsi711 <&clkc CLKID_FCLK_DIV5>,
Dmeson8b.dtsi703 <&clkc CLKID_FCLK_DIV5>,
/linux-5.19.10/drivers/clk/meson/ !
Dmeson8b.c2783 [CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
2991 [CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
3210 [CLKID_FCLK_DIV5] = &meson8b_fclk_div5.hw,
Dgxbb.c2739 [CLKID_FCLK_DIV5] = &gxbb_fclk_div5.hw,
2951 [CLKID_FCLK_DIV5] = &gxbb_fclk_div5.hw,
Dg12a.c4254 [CLKID_FCLK_DIV5] = &g12a_fclk_div5.hw,
4483 [CLKID_FCLK_DIV5] = &g12a_fclk_div5.hw,
4747 [CLKID_FCLK_DIV5] = &g12a_fclk_div5.hw,
Daxg.c1900 [CLKID_FCLK_DIV5] = &axg_fclk_div5.hw,