Searched refs:CIR_PWR_MASK0 (Results 1 – 2 of 2) sorted by relevance
23 #define CIR_PWR_MASK0 0x28 macro
1432 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,1435 "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],