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Searched refs:CC_REG (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/crypto/ccree/
Dcc_driver.c56 CC_REG(PERIPHERAL_ID_0), CC_REG(PERIPHERAL_ID_1),
57 CC_REG(PERIPHERAL_ID_2), CC_REG(PERIPHERAL_ID_4)
61 CC_REG(COMPONENT_ID_0), CC_REG(COMPONENT_ID_1),
62 CC_REG(COMPONENT_ID_2), CC_REG(COMPONENT_ID_3)
110 cache_params = cc_ioread(drvdata, CC_REG(AXIM_CACHE_PARAMS)); in init_cc_cache_params()
136 ace_const = cc_ioread(drvdata, CC_REG(AXIM_ACE_CONST)); in init_cc_cache_params()
195 irr = cc_ioread(drvdata, CC_REG(HOST_IRR)); in cc_isr()
201 imr = cc_ioread(drvdata, CC_REG(HOST_IMR)); in cc_isr()
204 cc_iowrite(drvdata, CC_REG(HOST_ICR), irr); in cc_isr()
212 cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | drvdata->comp_mask); in cc_isr()
[all …]
Dcc_fips.c26 reg = cc_ioread(drvdata, CC_REG(GPR_HOST)); in cc_get_tee_fips_status()
49 cc_iowrite(drvdata, CC_REG(HOST_GPR0), val); in cc_set_ree_fips_status()
126 val = (CC_REG(HOST_IMR) & ~irq); in fips_dsr()
127 cc_iowrite(drvdata, CC_REG(HOST_IMR), val); in fips_dsr()
Dcc_request_mgr.c146 CC_REG(DSCRPTR_QUEUE_SRAM_SIZE)); in cc_req_mgr_init()
188 void __iomem *reg = drvdata->cc_base + CC_REG(DSCRPTR_QUEUE_WORD0); in enqueue_seq()
248 cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT)); in cc_queues_status()
526 cc_ioread(drvdata, CC_REG(DSCRPTR_QUEUE_CONTENT)); in send_request_init()
627 cc_iowrite(drvdata, CC_REG(HOST_ICR), irq); in comp_handler()
638 drvdata->irq |= cc_ioread(drvdata, CC_REG(HOST_IRR)); in comp_handler()
649 cc_iowrite(drvdata, CC_REG(HOST_ICR), irq); in comp_handler()
657 cc_iowrite(drvdata, CC_REG(HOST_IMR), in comp_handler()
658 cc_ioread(drvdata, CC_REG(HOST_IMR)) & ~drvdata->comp_mask); in comp_handler()
Dcc_pm.c24 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_ENABLE); in cc_pm_suspend()
47 cc_iowrite(drvdata, CC_REG(HOST_POWER_DOWN_EN), POWER_DOWN_DISABLE); in cc_pm_resume()
Dcc_sram_mgr.c24 start = cc_ioread(drvdata, CC_REG(HOST_SEP_SRAM_THRESHOLD)); in cc_sram_mgr_init()
Dcc_debugfs.c13 .offset = CC_REG(_X) \
Dcc_driver.h94 #define CC_REG(reg_name) CC_ ## reg_name ## _REG_OFFSET macro