Searched refs:CCD_SRC_SEL_MASK (Results 1 – 1 of 1) sorted by relevance
75 #define CCD_SRC_SEL_MASK (BIT_MASK(5) | BIT_MASK(4)) macro153 u32 temp = isp5_read(DM365_ISP5_CCDCMUX) & ~CCD_SRC_SEL_MASK; in dm365_select_ccdc_source()