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Searched refs:CACHELINE_ALIGNED_DATA (Results 1 – 5 of 5) sorted by relevance

/linux-5.19.10/arch/mips/kernel/
Dvmlinux.lds.S95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
/linux-5.19.10/arch/ia64/kernel/
Dvmlinux.lds.S181 CACHELINE_ALIGNED_DATA(SMP_CACHE_BYTES)
/linux-5.19.10/arch/x86/kernel/
Dvmlinux.lds.S172 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
/linux-5.19.10/include/asm-generic/
Dvmlinux.lds.h377 #define CACHELINE_ALIGNED_DATA(align) \ macro
1138 CACHELINE_ALIGNED_DATA(cacheline) \
/linux-5.19.10/arch/powerpc/kernel/
Dvmlinux.lds.S357 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)