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Searched refs:BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/ !
Ddce_6_0_sh_mask.h1757 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK 0x0000ffffL macro
Ddce_8_0_sh_mask.h3247 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK 0xffff macro
Ddce_10_0_sh_mask.h3169 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK 0xffff macro
Ddce_11_0_sh_mask.h3239 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK 0xffff macro
Ddce_11_2_sh_mask.h3487 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK 0xffff macro
Ddce_12_0_sh_mask.h9322 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/ !
Ddcn_3_0_3_sh_mask.h21319 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro
Ddcn_1_0_sh_mask.h40073 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro
Ddcn_2_1_0_sh_mask.h43307 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro
Ddcn_3_0_2_sh_mask.h42589 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro
Ddcn_2_0_0_sh_mask.h48816 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro
Ddcn_3_0_0_sh_mask.h49184 #define BL_PWM_PERIOD_CNTL__BL_PWM_PERIOD_MASK … macro