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Searched refs:BL_PWM_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_panel_cntl.c61 REG_READ(BL_PWM_CNTL); in dce_get_16_bit_backlight_from_pwm()
62 REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, (uint32_t *)(&bl_pwm)); in dce_get_16_bit_backlight_from_pwm()
63 REG_GET(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, &fractional_duty_cycle_en); in dce_get_16_bit_backlight_from_pwm()
99 REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &value); in dce_panel_cntl_hw_init()
101 if (panel_cntl->stored_backlight_registers.BL_PWM_CNTL != 0) { in dce_panel_cntl_hw_init()
102 REG_WRITE(BL_PWM_CNTL, in dce_panel_cntl_hw_init()
103 panel_cntl->stored_backlight_registers.BL_PWM_CNTL); in dce_panel_cntl_hw_init()
112 panel_cntl->stored_backlight_registers.BL_PWM_CNTL = in dce_panel_cntl_hw_init()
113 REG_READ(BL_PWM_CNTL); in dce_panel_cntl_hw_init()
125 REG_WRITE(BL_PWM_CNTL, 0x8000FA00); in dce_panel_cntl_hw_init()
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Ddce_panel_cntl.h39 SR(BL_PWM_CNTL), \
53 SR(BL_PWM_CNTL), \
72 DCE_PANEL_CNTL_SF(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, mask_sh), \
73 DCE_PANEL_CNTL_SF(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, mask_sh), \
74 DCE_PANEL_CNTL_SF(BL_PWM_CNTL, BL_PWM_EN, mask_sh), \
107 uint32_t BL_PWM_CNTL; member
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_panel_cntl.c60 REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &bl_pwm); in dcn301_get_16_bit_backlight_from_pwm()
61 REG_GET(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, &fractional_duty_cycle_en); in dcn301_get_16_bit_backlight_from_pwm()
106 REG_GET(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, &value); in dcn301_panel_cntl_hw_init()
109 if (panel_cntl->stored_backlight_registers.BL_PWM_CNTL != 0) { in dcn301_panel_cntl_hw_init()
110 REG_WRITE(BL_PWM_CNTL, in dcn301_panel_cntl_hw_init()
111 panel_cntl->stored_backlight_registers.BL_PWM_CNTL); in dcn301_panel_cntl_hw_init()
123 REG_WRITE(BL_PWM_CNTL, 0xC000FA00); in dcn301_panel_cntl_hw_init()
127 panel_cntl->stored_backlight_registers.BL_PWM_CNTL = in dcn301_panel_cntl_hw_init()
128 REG_READ(BL_PWM_CNTL); in dcn301_panel_cntl_hw_init()
139 REG_UPDATE(BL_PWM_CNTL, BL_PWM_EN, 1); in dcn301_panel_cntl_hw_init()
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Ddcn301_panel_cntl.h37 SRIR(BL_PWM_CNTL, CNTL, BL_PWM, id), \
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_panel_cntl.c82 cmd.panel_cntl.data.bl_pwm_cntl = panel_cntl->stored_backlight_registers.BL_PWM_CNTL; in dcn31_panel_cntl_hw_init()
91 panel_cntl->stored_backlight_registers.BL_PWM_CNTL = cmd.panel_cntl.data.bl_pwm_cntl; in dcn31_panel_cntl_hw_init()
137 panel_cntl->stored_backlight_registers.BL_PWM_CNTL = cmd.panel_cntl.data.bl_pwm_cntl; in dcn31_store_backlight_level()
/linux-5.19.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dpanel_cntl.h38 unsigned int BL_PWM_CNTL; member