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Searched refs:BLC_PWM_CTL2 (Results 1 – 7 of 7) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/gma500/
Doaktrail_device.c81 REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2))); in oaktrail_set_brightness()
122 REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2))); in device_backlight_init()
234 regs->saveBLC_PWM_CTL2 = PSB_RVDC32(BLC_PWM_CTL2); in oaktrail_save_display_registers()
358 PSB_WVDC32(regs->saveBLC_PWM_CTL2, BLC_PWM_CTL2); in oaktrail_restore_display_registers()
Dcdv_device.c75 return REG_READ(BLC_PWM_CTL2) & PWM_LEGACY_MODE; in cdv_backlight_combination_mode()
288 regs->saveBLC_PWM_CTL2 = REG_READ(BLC_PWM_CTL2); in cdv_save_display_registers()
360 REG_WRITE(BLC_PWM_CTL2, regs->saveBLC_PWM_CTL2); in cdv_restore_display_registers()
Dcdv_intel_lvds.c639 pwm = REG_READ(BLC_PWM_CTL2); in cdv_intel_lvds_init()
645 REG_WRITE(BLC_PWM_CTL2, pwm); in cdv_intel_lvds_init()
Dpsb_intel_reg.h81 #define BLC_PWM_CTL2 0x61250 macro
Dcdv_intel_dp.c2023 pwm_ctrl = REG_READ(BLC_PWM_CTL2); in cdv_intel_dp_init()
2025 REG_WRITE(BLC_PWM_CTL2, pwm_ctrl); in cdv_intel_dp_init()
/linux-5.19.10/drivers/gpu/drm/i915/display/
Dintel_backlight.c380 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); in i965_disable_backlight()
381 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); in i965_disable_backlight()
622 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); in i965_enable_backlight()
626 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); in i965_enable_backlight()
641 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); in i965_enable_backlight()
642 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); in i965_enable_backlight()
643 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); in i965_enable_backlight()
1355 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); in i965_setup_backlight()
/linux-5.19.10/drivers/gpu/drm/i915/
Di915_reg.h2929 #define BLC_PWM_CTL2 _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61250) /* 965+ only */ macro