Searched refs:BLC_PWM_CTL2 (Results 1 – 7 of 7) sorted by relevance
/linux-5.19.10/drivers/gpu/drm/gma500/ |
D | oaktrail_device.c | 81 REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2))); in oaktrail_set_brightness() 122 REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2))); in device_backlight_init() 234 regs->saveBLC_PWM_CTL2 = PSB_RVDC32(BLC_PWM_CTL2); in oaktrail_save_display_registers() 358 PSB_WVDC32(regs->saveBLC_PWM_CTL2, BLC_PWM_CTL2); in oaktrail_restore_display_registers()
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D | cdv_device.c | 75 return REG_READ(BLC_PWM_CTL2) & PWM_LEGACY_MODE; in cdv_backlight_combination_mode() 288 regs->saveBLC_PWM_CTL2 = REG_READ(BLC_PWM_CTL2); in cdv_save_display_registers() 360 REG_WRITE(BLC_PWM_CTL2, regs->saveBLC_PWM_CTL2); in cdv_restore_display_registers()
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D | cdv_intel_lvds.c | 639 pwm = REG_READ(BLC_PWM_CTL2); in cdv_intel_lvds_init() 645 REG_WRITE(BLC_PWM_CTL2, pwm); in cdv_intel_lvds_init()
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D | psb_intel_reg.h | 81 #define BLC_PWM_CTL2 0x61250 macro
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D | cdv_intel_dp.c | 2023 pwm_ctrl = REG_READ(BLC_PWM_CTL2); in cdv_intel_dp_init() 2025 REG_WRITE(BLC_PWM_CTL2, pwm_ctrl); in cdv_intel_dp_init()
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/linux-5.19.10/drivers/gpu/drm/i915/display/ |
D | intel_backlight.c | 380 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); in i965_disable_backlight() 381 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); in i965_disable_backlight() 622 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); in i965_enable_backlight() 626 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); in i965_enable_backlight() 641 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); in i965_enable_backlight() 642 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); in i965_enable_backlight() 643 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); in i965_enable_backlight() 1355 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); in i965_setup_backlight()
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/linux-5.19.10/drivers/gpu/drm/i915/ |
D | i915_reg.h | 2929 #define BLC_PWM_CTL2 _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61250) /* 965+ only */ macro
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