Searched refs:BIT13 (Results 1 – 16 of 16) sorted by relevance
143 #define RCR_RXFTH BIT13215 #define IMR_BcnInt BIT13244 #define TPPoll_StopMgt BIT13374 #define RRSR_MCS1 BIT13
44 #define BIT13 0x00002000 macro
231 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
30 #define BIT13 0x00002000 macro
560 #define RRSR_MCS1 BIT13702 #define IMR_BcnInt BIT13 /* Beacon DMA Interrupt 0 */749 #define RCR_AMF BIT13 /* Accept management type frame */
57 #define DYNAMIC_BB_ADAPTIVITY BIT13/* ODM_BB_ADAPTIVITY */
23 #define BIT13 0x00002000 macro
32 #define BIT13 0x2000 macro
63 #define BIT13 0x00002000 macro
420 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */
394 rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); in PHY_BBConfig8723B()
379 ODM_BB_ADAPTIVITY = BIT13,
386 #define IRQ_TXDATA BIT134197 val |= BIT15 + BIT13; in sync_mode()4199 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()4201 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()4272 val |= BIT15 + BIT13; in sync_mode()4274 case MGSL_MODE_MONOSYNC: val |= BIT14 + BIT13; break; in sync_mode()4276 case MGSL_MODE_RAW: val |= BIT13; break; in sync_mode()
371 #define RRSR_MCS1 BIT13
781 #define LPFC_SLI4_INTR13 BIT13
292 #define IRQ_ALLSENT BIT13 // all sent