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Searched refs:AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h12182 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h13440 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h13446 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h14062 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h64436 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h28201 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_1_0_sh_mask.h47214 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_2_1_0_sh_mask.h49508 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_3_0_1_sh_mask.h46227 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_3_1_2_sh_mask.h53629 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_3_1_5_sh_mask.h54602 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_3_0_2_sh_mask.h55245 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_3_1_6_sh_mask.h55449 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_2_0_0_sh_mask.h60901 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro
Ddcn_3_0_0_sh_mask.h63820 #define AZALIA_CRC1_CHANNEL0__CRC_CHANNEL0__SHIFT … macro