Home
last modified time | relevance | path

Searched refs:ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_sh_mask.h4923 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK 0xc0 macro
Dgmc_8_2_sh_mask.h5885 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK 0xc0 macro
Dgmc_7_1_sh_mask.h5561 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK 0xc0 macro
Dgmc_8_1_sh_mask.h6007 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK 0xc0 macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_0_sh_mask.h7678 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
Dmmhub_9_1_sh_mask.h7341 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
Dmmhub_9_3_0_sh_mask.h7766 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
Dmmhub_1_7_sh_mask.h29337 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
/linux-5.19.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h6607 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
Dgc_9_1_sh_mask.h6420 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
Dgc_9_2_1_sh_mask.h6241 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro
Dgc_9_4_2_sh_mask.h28855 #define ATC_L2_CNTL2__L2_CACHE_UPDATE_MODE_MASK … macro