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Searched refs:ARM_IDLECT2 (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/arch/arm/mach-omap1/
Dpm.c148 omap_readl(ARM_IDLECT2)); in omap1_pm_idle()
272 ARM_SAVE(ARM_IDLECT2); in omap1_pm_suspend()
296 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); in omap1_pm_suspend()
350 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); in omap1_pm_suspend()
421 ARM_SAVE(ARM_IDLECT2); in omap_pm_debug_show()
476 ARM_SHOW(ARM_IDLECT2), in omap_pm_debug_show()
Dclock_data.c99 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
130 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
147 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
157 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
169 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
180 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
307 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
318 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
335 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
348 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
[all …]
Dsleep.S92 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
129 @ reset the ARM_IDLECT1 and ARM_IDLECT2.
177 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
247 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2
357 @ Restore the ARM_IDLECT1 and ARM_IDLECT2.
Dclock.c543 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) in omap1_clk_enable_generic()
564 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) in omap1_clk_enable_generic()
588 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) in omap1_clk_disable_generic()
609 else if (clk->enable_reg == OMAP1_IO_ADDRESS(ARM_IDLECT2)) in omap1_clk_disable_generic()
/linux-5.19.10/include/linux/soc/ti/
Domap1-io.h73 #define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) macro
/linux-5.19.10/drivers/video/fbdev/omap/
Dsossi.c604 l = omap_readl(ARM_IDLECT2); in sossi_init()
606 omap_writel(l, ARM_IDLECT2); in sossi_init()