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Searched refs:APBC_UART1 (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/clk/mmp/
Dclk-of-pxa168.c29 #define APBC_UART1 0x4 macro
132 …{0, "uart1_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART1
154 …{PXA168_CLK_UART1, "uart1_clk", "uart1_mux", CLK_SET_RATE_PARENT, APBC_UART1, 0x3, 0x3, 0x0, 0, &u…
Dclk-pxa910.c27 #define APBC_UART1 0x4 macro
219 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); in pxa910_clk_init()
224 apbc_base + APBC_UART1, 10, 0, &clk_lock); in pxa910_clk_init()
Dclk-of-pxa910.c29 #define APBC_UART1 0x4 macro
130 …{0, "uart1_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART1
152 …{PXA910_CLK_UART1, "uart1_clk", "uart1_mux", CLK_SET_RATE_PARENT, APBC_UART1, 0x3, 0x3, 0x0, 0, &u…
Dclk-pxa168.c27 #define APBC_UART1 0x4 macro
214 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); in pxa168_clk_init()
219 apbc_base + APBC_UART1, 10, 0, &clk_lock); in pxa168_clk_init()
Dclk-mmp2.c32 #define APBC_UART1 0x30 macro
259 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); in mmp2_clk_init()
264 apbc_base + APBC_UART1, 10, 0, &clk_lock); in mmp2_clk_init()
Dclk-of-mmp2.c38 #define APBC_UART1 0x30 macro
241 …{0, "uart1_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART1
267 …{MMP2_CLK_UART1, "uart1_clk", "uart1_mux", CLK_SET_RATE_PARENT, APBC_UART1, 0x7, 0x3, 0x0, 0, &uar…