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Searched refs:APBC_UART0 (Results 1 – 6 of 6) sorted by relevance

/linux-5.19.10/drivers/clk/mmp/
Dclk-of-pxa168.c28 #define APBC_UART0 0x0 macro
131 …{0, "uart0_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART0
153 …{PXA168_CLK_UART0, "uart0_clk", "uart0_mux", CLK_SET_RATE_PARENT, APBC_UART0, 0x3, 0x3, 0x0, 0, &u…
Dclk-pxa910.c26 #define APBC_UART0 0x0 macro
208 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); in pxa910_clk_init()
213 apbc_base + APBC_UART0, 10, 0, &clk_lock); in pxa910_clk_init()
Dclk-of-pxa910.c28 #define APBC_UART0 0x0 macro
129 …{0, "uart0_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART0
151 …{PXA910_CLK_UART0, "uart0_clk", "uart0_mux", CLK_SET_RATE_PARENT, APBC_UART0, 0x3, 0x3, 0x0, 0, &u…
Dclk-pxa168.c26 #define APBC_UART0 0x0 macro
203 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); in pxa168_clk_init()
208 apbc_base + APBC_UART0, 10, 0, &clk_lock); in pxa168_clk_init()
Dclk-mmp2.c31 #define APBC_UART0 0x2c macro
248 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); in mmp2_clk_init()
253 apbc_base + APBC_UART0, 10, 0, &clk_lock); in mmp2_clk_init()
Dclk-of-mmp2.c37 #define APBC_UART0 0x2c macro
240 …{0, "uart0_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART0
266 …{MMP2_CLK_UART0, "uart0_clk", "uart0_mux", CLK_SET_RATE_PARENT, APBC_UART0, 0x7, 0x3, 0x0, 0, &uar…