| /linux-5.19.10/arch/mips/include/asm/octeon/ |
| D | cvmx-pexp-defs.h | 31 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31… argument
43 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000008450ull) + ((offset) & 7)… argument
44 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F00000083B0ull) + ((offset) & 7) … argument
45 #define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000008400ull) + ((offset)… argument
46 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x00011F00000084A0ull) + ((offset) & 7) … argument
68 #define CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008280ull) + ((offset… argument
92 #define CVMX_PEXP_NPEI_PKTX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F000000A400ull) + ((offset) & 31) … argument
93 #define CVMX_PEXP_NPEI_PKTX_INSTR_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F000000A800ull) + ((offset)… argument
94 #define CVMX_PEXP_NPEI_PKTX_INSTR_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F000000AC00ull) + ((o… argument
95 #define CVMX_PEXP_NPEI_PKTX_INSTR_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F000000B000ull) + ((of… argument
[all …]
|
| D | cvmx-pcsx-defs.h | 31 static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_ADV_REG() argument
35 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
38 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
46 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_ADV_REG()
49 static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) in CVMX_PCSX_ANX_EXT_ST_REG() argument
53 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; in CVMX_PCSX_ANX_EXT_ST_REG()
[all …]
|
| /linux-5.19.10/arch/arm/kernel/ |
| D | module.c | 94 static u32 get_group_rem(u32 group, u32 *offset) in get_group_rem() argument
96 u32 val = *offset; in get_group_rem()
100 *offset = val; in get_group_rem()
126 s32 offset; in apply_relocate() local
132 offset = ELF32_R_SYM(rel->r_info); in apply_relocate()
133 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { in apply_relocate()
139 sym = ((Elf32_Sym *)symsec->sh_addr) + offset; in apply_relocate()
170 offset = __mem_to_opcode_arm(*(u32 *)loc); in apply_relocate()
171 offset = (offset & 0x00ffffff) << 2; in apply_relocate()
172 if (offset & 0x02000000) in apply_relocate()
[all …]
|
| /linux-5.19.10/drivers/crypto/cavium/nitrox/ |
| D | nitrox_hal.c | 44 u64 offset; in nitrox_config_emu_unit() local
58 offset = EMU_WD_INT_ENA_W1SX(i); in nitrox_config_emu_unit()
59 nitrox_write_csr(ndev, offset, emu_wd_int.value); in nitrox_config_emu_unit()
60 offset = EMU_GE_INT_ENA_W1SX(i); in nitrox_config_emu_unit()
61 nitrox_write_csr(ndev, offset, emu_ge_int.value); in nitrox_config_emu_unit()
70 u64 offset; in reset_pkt_input_ring() local
73 offset = NPS_PKT_IN_INSTR_CTLX(ring); in reset_pkt_input_ring()
74 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring()
76 nitrox_write_csr(ndev, offset, pkt_in_ctl.value); in reset_pkt_input_ring()
81 pkt_in_ctl.value = nitrox_read_csr(ndev, offset); in reset_pkt_input_ring()
[all …]
|
| /linux-5.19.10/scripts/dtc/libfdt/ |
| D | fdt_ro.c | 13 static int fdt_nodename_eq_(const void *fdt, int offset, in fdt_nodename_eq_() argument
17 const char *p = fdt_get_name(fdt, offset, &olen); in fdt_nodename_eq_()
117 int offset = -1; in fdt_find_max_phandle() local
122 offset = fdt_next_node(fdt, offset, NULL); in fdt_find_max_phandle()
123 if (offset < 0) { in fdt_find_max_phandle()
124 if (offset == -FDT_ERR_NOTFOUND) in fdt_find_max_phandle()
127 return offset; in fdt_find_max_phandle()
130 value = fdt_get_phandle(fdt, offset); in fdt_find_max_phandle()
162 unsigned int offset = n * sizeof(struct fdt_reserve_entry); in fdt_mem_rsv() local
163 unsigned int absoffset = fdt_off_mem_rsvmap(fdt) + offset; in fdt_mem_rsv()
[all …]
|
| D | fdt.c | 143 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) in fdt_offset_ptr() argument
145 unsigned int uoffset = offset; in fdt_offset_ptr()
146 unsigned int absoffset = offset + fdt_off_dt_struct(fdt); in fdt_offset_ptr()
148 if (offset < 0) in fdt_offset_ptr()
159 || ((offset + len) > fdt_size_dt_struct(fdt))) in fdt_offset_ptr()
162 return fdt_offset_ptr_(fdt, offset); in fdt_offset_ptr()
169 int offset = startoffset; in fdt_next_tag() local
173 tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); in fdt_next_tag()
177 offset += FDT_TAGSIZE; in fdt_next_tag()
184 p = fdt_offset_ptr(fdt, offset++, 1); in fdt_next_tag()
[all …]
|
| /linux-5.19.10/drivers/net/ethernet/microchip/lan966x/ |
| D | lan966x_ethtool.c | 12 { .name = "rx_octets", .offset = 0x00, },
13 { .name = "rx_unicast", .offset = 0x01, },
14 { .name = "rx_multicast", .offset = 0x02 },
15 { .name = "rx_broadcast", .offset = 0x03 },
16 { .name = "rx_short", .offset = 0x04 },
17 { .name = "rx_frag", .offset = 0x05 },
18 { .name = "rx_jabber", .offset = 0x06 },
19 { .name = "rx_crc", .offset = 0x07 },
20 { .name = "rx_symbol_err", .offset = 0x08 },
21 { .name = "rx_sz_64", .offset = 0x09 },
[all …]
|
| /linux-5.19.10/arch/sh/boards/mach-microdev/ |
| D | io.c | 55 void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) in microdev_ioport_map() argument
59 if ((offset >= IO_LAN91C111_BASE) && in microdev_ioport_map()
60 (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { in microdev_ioport_map()
64 result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE; in microdev_ioport_map()
65 } else if ((offset >= IO_SUPERIO_BASE) && in microdev_ioport_map()
66 (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) { in microdev_ioport_map()
72 result = IO_SUPERIO_PHYS + (offset << 1); in microdev_ioport_map()
73 } else if (((offset >= IO_IDE1_BASE) && in microdev_ioport_map()
74 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || in microdev_ioport_map()
75 (offset == IO_IDE1_MISC)) { in microdev_ioport_map()
[all …]
|
| /linux-5.19.10/drivers/thunderbolt/ |
| D | cap.c | 21 u32 value, offset; in tb_port_enable_tmu() local
29 offset = 0x26; in tb_port_enable_tmu()
31 offset = 0x2a; in tb_port_enable_tmu()
35 ret = tb_sw_read(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_port_enable_tmu()
44 return tb_sw_write(sw, &value, TB_CFG_SWITCH, offset, 1); in tb_port_enable_tmu()
72 int tb_port_next_cap(struct tb_port *port, unsigned int offset) in tb_port_next_cap() argument
77 if (!offset) in tb_port_next_cap()
80 ret = tb_port_read(port, &header, TB_CFG_PORT, offset, 1); in tb_port_next_cap()
89 int offset = 0; in __tb_port_find_cap() local
95 offset = tb_port_next_cap(port, offset); in __tb_port_find_cap()
[all …]
|
| /linux-5.19.10/drivers/misc/ocxl/ |
| D | mmio.c | 7 int ocxl_global_mmio_read32(struct ocxl_afu *afu, size_t offset, in ocxl_global_mmio_read32() argument
10 if (offset > afu->config.global_mmio_size - 4) in ocxl_global_mmio_read32()
20 *val = readl_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read32()
24 *val = readl((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read32()
32 int ocxl_global_mmio_read64(struct ocxl_afu *afu, size_t offset, in ocxl_global_mmio_read64() argument
35 if (offset > afu->config.global_mmio_size - 8) in ocxl_global_mmio_read64()
45 *val = readq_be((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read64()
49 *val = readq((char *)afu->global_mmio_ptr + offset); in ocxl_global_mmio_read64()
57 int ocxl_global_mmio_write32(struct ocxl_afu *afu, size_t offset, in ocxl_global_mmio_write32() argument
60 if (offset > afu->config.global_mmio_size - 4) in ocxl_global_mmio_write32()
[all …]
|
| /linux-5.19.10/drivers/net/wireless/ath/ath10k/ |
| D | qmi_wlfw_v01.c | 17 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01,
26 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01,
35 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01,
44 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01,
53 .offset = offsetof(struct wlfw_ce_tgt_pipe_cfg_s_v01,
66 .offset = offsetof(struct wlfw_ce_svc_pipe_cfg_s_v01,
75 .offset = offsetof(struct wlfw_ce_svc_pipe_cfg_s_v01,
84 .offset = offsetof(struct wlfw_ce_svc_pipe_cfg_s_v01,
97 .offset = offsetof(struct wlfw_shadow_reg_cfg_s_v01,
106 .offset = offsetof(struct wlfw_shadow_reg_cfg_s_v01,
[all …]
|
| /linux-5.19.10/drivers/net/dsa/sja1105/ |
| D | sja1105_ethtool.c | 83 int offset; member
94 .offset = 0,
101 .offset = 0x0,
108 .offset = 0x0,
115 .offset = 0x0,
123 .offset = 0x1,
130 .offset = 0x1,
137 .offset = 0x1,
144 .offset = 0x1,
151 .offset = 0x1,
[all …]
|
| /linux-5.19.10/drivers/gpio/ |
| D | gpio-eic-sprd.c | 140 static void sprd_eic_update(struct gpio_chip *chip, unsigned int offset, in sprd_eic_update() argument
145 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR); in sprd_eic_update()
153 tmp |= BIT(SPRD_EIC_BIT(offset)); in sprd_eic_update()
155 tmp &= ~BIT(SPRD_EIC_BIT(offset)); in sprd_eic_update()
161 static int sprd_eic_read(struct gpio_chip *chip, unsigned int offset, u16 reg) in sprd_eic_read() argument
165 sprd_eic_offset_base(sprd_eic, offset / SPRD_EIC_PER_BANK_NR); in sprd_eic_read()
167 return !!(readl_relaxed(base + reg) & BIT(SPRD_EIC_BIT(offset))); in sprd_eic_read()
170 static int sprd_eic_request(struct gpio_chip *chip, unsigned int offset) in sprd_eic_request() argument
172 sprd_eic_update(chip, offset, SPRD_EIC_DBNC_DMSK, 1); in sprd_eic_request()
176 static void sprd_eic_free(struct gpio_chip *chip, unsigned int offset) in sprd_eic_free() argument
[all …]
|
| D | gpio-cs5535.c | 83 static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset, in __cs5535_gpio_set() argument
86 if (offset < 16) in __cs5535_gpio_set()
88 outl(1 << offset, chip->base + reg); in __cs5535_gpio_set()
91 errata_outl(chip, 1 << (offset - 16), reg); in __cs5535_gpio_set()
94 void cs5535_gpio_set(unsigned offset, unsigned int reg) in cs5535_gpio_set() argument
100 __cs5535_gpio_set(chip, offset, reg); in cs5535_gpio_set()
105 static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset, in __cs5535_gpio_clear() argument
108 if (offset < 16) in __cs5535_gpio_clear()
110 outl(1 << (offset + 16), chip->base + reg); in __cs5535_gpio_clear()
113 errata_outl(chip, 1 << offset, reg); in __cs5535_gpio_clear()
[all …]
|
| D | gpio-aspeed.c | 251 static const struct aspeed_gpio_bank *to_bank(unsigned int offset) in to_bank() argument
253 unsigned int bank = GPIO_BANK(offset); in to_bank()
265 struct aspeed_gpio *gpio, unsigned int offset) in find_bank_props() argument
270 if (props->bank == GPIO_BANK(offset)) in find_bank_props()
278 static inline bool have_gpio(struct aspeed_gpio *gpio, unsigned int offset) in have_gpio() argument
280 const struct aspeed_bank_props *props = find_bank_props(gpio, offset); in have_gpio()
281 const struct aspeed_gpio_bank *bank = to_bank(offset); in have_gpio()
282 unsigned int group = GPIO_OFFSET(offset) / 8; in have_gpio()
285 (!props || ((props->input | props->output) & GPIO_BIT(offset))); in have_gpio()
288 static inline bool have_input(struct aspeed_gpio *gpio, unsigned int offset) in have_input() argument
[all …]
|
| D | gpio-sprd.c | 48 static void sprd_gpio_update(struct gpio_chip *chip, unsigned int offset, in sprd_gpio_update() argument
53 offset / SPRD_GPIO_BANK_NR); in sprd_gpio_update()
61 tmp |= BIT(SPRD_GPIO_BIT(offset)); in sprd_gpio_update()
63 tmp &= ~BIT(SPRD_GPIO_BIT(offset)); in sprd_gpio_update()
69 static int sprd_gpio_read(struct gpio_chip *chip, unsigned int offset, u16 reg) in sprd_gpio_read() argument
73 offset / SPRD_GPIO_BANK_NR); in sprd_gpio_read()
75 return !!(readl_relaxed(base + reg) & BIT(SPRD_GPIO_BIT(offset))); in sprd_gpio_read()
78 static int sprd_gpio_request(struct gpio_chip *chip, unsigned int offset) in sprd_gpio_request() argument
80 sprd_gpio_update(chip, offset, SPRD_GPIO_DMSK, 1); in sprd_gpio_request()
84 static void sprd_gpio_free(struct gpio_chip *chip, unsigned int offset) in sprd_gpio_free() argument
[all …]
|
| /linux-5.19.10/drivers/staging/media/atomisp/pci/ |
| D | ia_css_isp_configs.c | 27 unsigned int offset = 0; in ia_css_configure_iterator() local
39 offset = binary->info->mem_offsets.offsets.config->dmem.iterator.offset; in ia_css_configure_iterator()
42 &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], in ia_css_configure_iterator()
50 unsigned int offset = 0; in ia_css_configure_copy_output() local
62 offset = binary->info->mem_offsets.offsets.config->dmem.copy_output.offset; in ia_css_configure_copy_output()
65 &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], in ia_css_configure_copy_output()
75 unsigned int offset = 0; in ia_css_configure_crop() local
87 offset = binary->info->mem_offsets.offsets.config->dmem.crop.offset; in ia_css_configure_crop()
90 &binary->mem_params.params[IA_CSS_PARAM_CLASS_CONFIG][IA_CSS_ISP_DMEM].address[offset], in ia_css_configure_crop()
98 unsigned int offset = 0; in ia_css_configure_fpn() local
[all …]
|
| /linux-5.19.10/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | init.c | 43 init->offset, init_exec(init) ? \
365 return bit_I.offset; in init_table()
377 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
382 if (len >= offset + 2) { in init_table_()
383 data = nvbios_rd16(bios, data + offset); in init_table_()
461 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
468 return nvbios_rd08(bios, data + offset); in init_xlat_()
586 u8 opcode = nvbios_rd08(bios, init->offset); in init_reserved()
600 cont(" 0x%02x", nvbios_rd08(bios, init->offset + i)); in init_reserved()
602 init->offset += length; in init_reserved()
[all …]
|
| /linux-5.19.10/drivers/pinctrl/ |
| D | pinctrl-da9062.c | 31 #define DA9062_TYPE(offset) (4 * (offset % 2)) argument
32 #define DA9062_PIN_SHIFT(offset) (4 * (offset % 2)) argument
46 unsigned int offset) in da9062_pctl_get_pin_mode() argument
51 ret = regmap_read(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), &val); in da9062_pctl_get_pin_mode()
55 val >>= DA9062_PIN_SHIFT(offset); in da9062_pctl_get_pin_mode()
62 unsigned int offset, unsigned int mode_req) in da9062_pctl_set_pin_mode() argument
70 mode <<= DA9062_PIN_SHIFT(offset); in da9062_pctl_set_pin_mode()
71 mask = DA9062AA_GPIO0_PIN_MASK << DA9062_PIN_SHIFT(offset); in da9062_pctl_set_pin_mode()
73 ret = regmap_update_bits(regmap, DA9062AA_GPIO_0_1 + (offset >> 1), in da9062_pctl_set_pin_mode()
76 pctl->pin_config[offset] = mode_req; in da9062_pctl_set_pin_mode()
[all …]
|
| /linux-5.19.10/drivers/net/ethernet/mscc/ |
| D | ocelot_vsc7514.c | 102 .offset = 0x00,
106 .offset = 0x01,
110 .offset = 0x02,
114 .offset = 0x03,
118 .offset = 0x04,
122 .offset = 0x05,
126 .offset = 0x06,
130 .offset = 0x07,
134 .offset = 0x08,
138 .offset = 0x09,
[all …]
|
| /linux-5.19.10/drivers/hwtracing/coresight/ |
| D | coresight-etm4x-cfg.c | 15 if (offset == cval) { \
47 struct cscfg_regval_csdev *reg_csdev, u32 offset) in etm4_cfg_map_reg_offset() argument
53 if (((offset >= TRCEVENTCTL0R) && (offset <= TRCVIPCSSCTLR)) || in etm4_cfg_map_reg_offset()
54 ((offset >= TRCSEQRSTEVR) && (offset <= TRCEXTINSELR)) || in etm4_cfg_map_reg_offset()
55 ((offset >= TRCCIDCCTLR0) && (offset <= TRCVMIDCCTLR1))) { in etm4_cfg_map_reg_offset()
76 } else if ((offset & GENMASK(11, 4)) == TRCSEQEVRn(0)) { in etm4_cfg_map_reg_offset()
78 idx = (offset & GENMASK(3, 0)) / 4; in etm4_cfg_map_reg_offset()
83 } else if ((offset >= TRCSSCCRn(0)) && (offset <= TRCSSPCICRn(7))) { in etm4_cfg_map_reg_offset()
85 idx = (offset & GENMASK(4, 0)) / 4; in etm4_cfg_map_reg_offset()
86 off_mask = (offset & GENMASK(11, 5)); in etm4_cfg_map_reg_offset()
[all …]
|
| /linux-5.19.10/drivers/gpu/drm/tegra/ |
| D | trace.h | 11 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
12 TP_ARGS(dev, offset, value),
15 __field(unsigned int, offset)
20 __entry->offset = offset;
23 TP_printk("%s %04x %08x", dev_name(__entry->dev), __entry->offset,
28 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
29 TP_ARGS(dev, offset, value));
31 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
32 TP_ARGS(dev, offset, value));
35 TP_PROTO(struct device *dev, unsigned int offset, u32 value),
[all …]
|
| /linux-5.19.10/drivers/net/ipa/ |
| D | ipa_qmi_msg.c | 20 .offset = offsetof(struct ipa_indication_register_req,
30 .offset = offsetof(struct ipa_indication_register_req,
40 .offset = offsetof(struct ipa_indication_register_req,
50 .offset = offsetof(struct ipa_indication_register_req,
60 .offset = offsetof(struct ipa_indication_register_req,
70 .offset = offsetof(struct ipa_indication_register_req,
80 .offset = offsetof(struct ipa_indication_register_req,
90 .offset = offsetof(struct ipa_indication_register_req,
100 .offset = offsetof(struct ipa_indication_register_req,
110 .offset = offsetof(struct ipa_indication_register_req,
[all …]
|
| /linux-5.19.10/drivers/gpu/drm/i915/display/ |
| D | dvo_ns2501.c | 195 u8 offset; member
301 [0] = { .offset = 0x0a, .value = 0x81, },
303 [1] = { .offset = 0x12, .value = 0x02, },
304 [2] = { .offset = 0x18, .value = 0x07, },
305 [3] = { .offset = 0x19, .value = 0x00, },
306 [4] = { .offset = 0x1a, .value = 0x00, }, /* PLL?, ignored */
308 [5] = { .offset = 0x1e, .value = 0x02, },
309 [6] = { .offset = 0x1f, .value = 0x40, },
310 [7] = { .offset = 0x20, .value = 0x00, },
311 [8] = { .offset = 0x21, .value = 0x00, },
[all …]
|
| /linux-5.19.10/drivers/mtd/parsers/ |
| D | bcm47xxpart.c | 51 uint32_t offset[3]; member
55 u64 offset, uint32_t mask_flags) in bcm47xxpart_add_part() argument
58 part->offset = offset; in bcm47xxpart_add_part()
94 uint32_t offset; in bcm47xxpart_parse() local
121 for (offset = 0; offset <= master->size - blocksize; in bcm47xxpart_parse()
122 offset += blocksize) { in bcm47xxpart_parse()
124 if (IS_ENABLED(CONFIG_BCM47XX) && offset >= 0x2000000) in bcm47xxpart_parse()
133 err = mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, in bcm47xxpart_parse()
137 offset, err); in bcm47xxpart_parse()
145 offset, MTD_WRITEABLE); in bcm47xxpart_parse()
[all …]
|