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Searched refs:vpll_con0 (Results 1 – 1 of 1) sorted by relevance

/linux-3.4.99/arch/arm/mach-exynos/
Dclock-exynos4.c1385 unsigned int vpll_con0, vpll_con1 = 0; in exynos4_vpll_set_rate() local
1392 vpll_con0 = __raw_readl(EXYNOS4_VPLL_CON0); in exynos4_vpll_set_rate()
1393 vpll_con0 &= ~(0x1 << 27 | \ in exynos4_vpll_set_rate()
1405 vpll_con0 |= exynos4_vpll_div[i][1] << PLL46XX_PDIV_SHIFT; in exynos4_vpll_set_rate()
1406 vpll_con0 |= exynos4_vpll_div[i][2] << PLL46XX_MDIV_SHIFT; in exynos4_vpll_set_rate()
1407 vpll_con0 |= exynos4_vpll_div[i][3] << PLL46XX_SDIV_SHIFT; in exynos4_vpll_set_rate()
1411 vpll_con0 |= exynos4_vpll_div[i][7] << 27; in exynos4_vpll_set_rate()
1422 __raw_writel(vpll_con0, EXYNOS4_VPLL_CON0); in exynos4_vpll_set_rate()