1 /***********************license start***************
2  * Author: Cavium Networks
3  *
4  * Contact: support@caviumnetworks.com
5  * This file is part of the OCTEON SDK
6  *
7  * Copyright (c) 2003-2010 Cavium Networks
8  *
9  * This file is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License, Version 2, as
11  * published by the Free Software Foundation.
12  *
13  * This file is distributed in the hope that it will be useful, but
14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16  * NONINFRINGEMENT.  See the GNU General Public License for more
17  * details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this file; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22  * or visit http://www.gnu.org/licenses/.
23  *
24  * This file may also be available under a different license from Cavium.
25  * Contact Cavium Networks for more information
26  ***********************license end**************************************/
27 
28 #ifndef __CVMX_MIO_DEFS_H__
29 #define __CVMX_MIO_DEFS_H__
30 
31 #define CVMX_MIO_BOOT_BIST_STAT (CVMX_ADD_IO_SEG(0x00011800000000F8ull))
32 #define CVMX_MIO_BOOT_COMP (CVMX_ADD_IO_SEG(0x00011800000000B8ull))
33 #define CVMX_MIO_BOOT_DMA_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000100ull) + ((offset) & 3) * 8)
34 #define CVMX_MIO_BOOT_DMA_INTX(offset) (CVMX_ADD_IO_SEG(0x0001180000000138ull) + ((offset) & 3) * 8)
35 #define CVMX_MIO_BOOT_DMA_INT_ENX(offset) (CVMX_ADD_IO_SEG(0x0001180000000150ull) + ((offset) & 3) * 8)
36 #define CVMX_MIO_BOOT_DMA_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001180000000120ull) + ((offset) & 3) * 8)
37 #define CVMX_MIO_BOOT_ERR (CVMX_ADD_IO_SEG(0x00011800000000A0ull))
38 #define CVMX_MIO_BOOT_INT (CVMX_ADD_IO_SEG(0x00011800000000A8ull))
39 #define CVMX_MIO_BOOT_LOC_ADR (CVMX_ADD_IO_SEG(0x0001180000000090ull))
40 #define CVMX_MIO_BOOT_LOC_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000080ull) + ((offset) & 1) * 8)
41 #define CVMX_MIO_BOOT_LOC_DAT (CVMX_ADD_IO_SEG(0x0001180000000098ull))
42 #define CVMX_MIO_BOOT_PIN_DEFS (CVMX_ADD_IO_SEG(0x00011800000000C0ull))
43 #define CVMX_MIO_BOOT_REG_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001180000000000ull) + ((offset) & 7) * 8)
44 #define CVMX_MIO_BOOT_REG_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001180000000040ull) + ((offset) & 7) * 8)
45 #define CVMX_MIO_BOOT_THR (CVMX_ADD_IO_SEG(0x00011800000000B0ull))
46 #define CVMX_MIO_EMM_BUF_DAT (CVMX_ADD_IO_SEG(0x00011800000020E8ull))
47 #define CVMX_MIO_EMM_BUF_IDX (CVMX_ADD_IO_SEG(0x00011800000020E0ull))
48 #define CVMX_MIO_EMM_CFG (CVMX_ADD_IO_SEG(0x0001180000002000ull))
49 #define CVMX_MIO_EMM_CMD (CVMX_ADD_IO_SEG(0x0001180000002058ull))
50 #define CVMX_MIO_EMM_DMA (CVMX_ADD_IO_SEG(0x0001180000002050ull))
51 #define CVMX_MIO_EMM_INT (CVMX_ADD_IO_SEG(0x0001180000002078ull))
52 #define CVMX_MIO_EMM_INT_EN (CVMX_ADD_IO_SEG(0x0001180000002080ull))
53 #define CVMX_MIO_EMM_MODEX(offset) (CVMX_ADD_IO_SEG(0x0001180000002008ull) + ((offset) & 3) * 8)
54 #define CVMX_MIO_EMM_RCA (CVMX_ADD_IO_SEG(0x00011800000020A0ull))
55 #define CVMX_MIO_EMM_RSP_HI (CVMX_ADD_IO_SEG(0x0001180000002070ull))
56 #define CVMX_MIO_EMM_RSP_LO (CVMX_ADD_IO_SEG(0x0001180000002068ull))
57 #define CVMX_MIO_EMM_RSP_STS (CVMX_ADD_IO_SEG(0x0001180000002060ull))
58 #define CVMX_MIO_EMM_SAMPLE (CVMX_ADD_IO_SEG(0x0001180000002090ull))
59 #define CVMX_MIO_EMM_STS_MASK (CVMX_ADD_IO_SEG(0x0001180000002098ull))
60 #define CVMX_MIO_EMM_SWITCH (CVMX_ADD_IO_SEG(0x0001180000002048ull))
61 #define CVMX_MIO_EMM_WDOG (CVMX_ADD_IO_SEG(0x0001180000002088ull))
62 #define CVMX_MIO_FUS_BNK_DATX(offset) (CVMX_ADD_IO_SEG(0x0001180000001520ull) + ((offset) & 3) * 8)
63 #define CVMX_MIO_FUS_DAT0 (CVMX_ADD_IO_SEG(0x0001180000001400ull))
64 #define CVMX_MIO_FUS_DAT1 (CVMX_ADD_IO_SEG(0x0001180000001408ull))
65 #define CVMX_MIO_FUS_DAT2 (CVMX_ADD_IO_SEG(0x0001180000001410ull))
66 #define CVMX_MIO_FUS_DAT3 (CVMX_ADD_IO_SEG(0x0001180000001418ull))
67 #define CVMX_MIO_FUS_EMA (CVMX_ADD_IO_SEG(0x0001180000001550ull))
68 #define CVMX_MIO_FUS_PDF (CVMX_ADD_IO_SEG(0x0001180000001420ull))
69 #define CVMX_MIO_FUS_PLL (CVMX_ADD_IO_SEG(0x0001180000001580ull))
70 #define CVMX_MIO_FUS_PROG (CVMX_ADD_IO_SEG(0x0001180000001510ull))
71 #define CVMX_MIO_FUS_PROG_TIMES (CVMX_ADD_IO_SEG(0x0001180000001518ull))
72 #define CVMX_MIO_FUS_RCMD (CVMX_ADD_IO_SEG(0x0001180000001500ull))
73 #define CVMX_MIO_FUS_READ_TIMES (CVMX_ADD_IO_SEG(0x0001180000001570ull))
74 #define CVMX_MIO_FUS_REPAIR_RES0 (CVMX_ADD_IO_SEG(0x0001180000001558ull))
75 #define CVMX_MIO_FUS_REPAIR_RES1 (CVMX_ADD_IO_SEG(0x0001180000001560ull))
76 #define CVMX_MIO_FUS_REPAIR_RES2 (CVMX_ADD_IO_SEG(0x0001180000001568ull))
77 #define CVMX_MIO_FUS_SPR_REPAIR_RES (CVMX_ADD_IO_SEG(0x0001180000001548ull))
78 #define CVMX_MIO_FUS_SPR_REPAIR_SUM (CVMX_ADD_IO_SEG(0x0001180000001540ull))
79 #define CVMX_MIO_FUS_TGG (CVMX_ADD_IO_SEG(0x0001180000001428ull))
80 #define CVMX_MIO_FUS_UNLOCK (CVMX_ADD_IO_SEG(0x0001180000001578ull))
81 #define CVMX_MIO_FUS_WADR (CVMX_ADD_IO_SEG(0x0001180000001508ull))
82 #define CVMX_MIO_GPIO_COMP (CVMX_ADD_IO_SEG(0x00011800000000C8ull))
83 #define CVMX_MIO_NDF_DMA_CFG (CVMX_ADD_IO_SEG(0x0001180000000168ull))
84 #define CVMX_MIO_NDF_DMA_INT (CVMX_ADD_IO_SEG(0x0001180000000170ull))
85 #define CVMX_MIO_NDF_DMA_INT_EN (CVMX_ADD_IO_SEG(0x0001180000000178ull))
86 #define CVMX_MIO_PLL_CTL (CVMX_ADD_IO_SEG(0x0001180000001448ull))
87 #define CVMX_MIO_PLL_SETTING (CVMX_ADD_IO_SEG(0x0001180000001440ull))
88 #define CVMX_MIO_PTP_CKOUT_HI_INCR (CVMX_ADD_IO_SEG(0x0001070000000F40ull))
89 #define CVMX_MIO_PTP_CKOUT_LO_INCR (CVMX_ADD_IO_SEG(0x0001070000000F48ull))
90 #define CVMX_MIO_PTP_CKOUT_THRESH_HI (CVMX_ADD_IO_SEG(0x0001070000000F38ull))
91 #define CVMX_MIO_PTP_CKOUT_THRESH_LO (CVMX_ADD_IO_SEG(0x0001070000000F30ull))
92 #define CVMX_MIO_PTP_CLOCK_CFG (CVMX_ADD_IO_SEG(0x0001070000000F00ull))
93 #define CVMX_MIO_PTP_CLOCK_COMP (CVMX_ADD_IO_SEG(0x0001070000000F18ull))
94 #define CVMX_MIO_PTP_CLOCK_HI (CVMX_ADD_IO_SEG(0x0001070000000F10ull))
95 #define CVMX_MIO_PTP_CLOCK_LO (CVMX_ADD_IO_SEG(0x0001070000000F08ull))
96 #define CVMX_MIO_PTP_EVT_CNT (CVMX_ADD_IO_SEG(0x0001070000000F28ull))
97 #define CVMX_MIO_PTP_PPS_HI_INCR (CVMX_ADD_IO_SEG(0x0001070000000F60ull))
98 #define CVMX_MIO_PTP_PPS_LO_INCR (CVMX_ADD_IO_SEG(0x0001070000000F68ull))
99 #define CVMX_MIO_PTP_PPS_THRESH_HI (CVMX_ADD_IO_SEG(0x0001070000000F58ull))
100 #define CVMX_MIO_PTP_PPS_THRESH_LO (CVMX_ADD_IO_SEG(0x0001070000000F50ull))
101 #define CVMX_MIO_PTP_TIMESTAMP (CVMX_ADD_IO_SEG(0x0001070000000F20ull))
102 #define CVMX_MIO_QLMX_CFG(offset) (CVMX_ADD_IO_SEG(0x0001180000001590ull) + ((offset) & 7) * 8)
103 #define CVMX_MIO_RST_BOOT (CVMX_ADD_IO_SEG(0x0001180000001600ull))
104 #define CVMX_MIO_RST_CFG (CVMX_ADD_IO_SEG(0x0001180000001610ull))
105 #define CVMX_MIO_RST_CKILL (CVMX_ADD_IO_SEG(0x0001180000001638ull))
106 #define CVMX_MIO_RST_CNTLX(offset) (CVMX_ADD_IO_SEG(0x0001180000001648ull) + ((offset) & 3) * 8)
107 #define CVMX_MIO_RST_CTLX(offset) (CVMX_ADD_IO_SEG(0x0001180000001618ull) + ((offset) & 1) * 8)
108 #define CVMX_MIO_RST_DELAY (CVMX_ADD_IO_SEG(0x0001180000001608ull))
109 #define CVMX_MIO_RST_INT (CVMX_ADD_IO_SEG(0x0001180000001628ull))
110 #define CVMX_MIO_RST_INT_EN (CVMX_ADD_IO_SEG(0x0001180000001630ull))
111 #define CVMX_MIO_TWSX_INT(offset) (CVMX_ADD_IO_SEG(0x0001180000001010ull) + ((offset) & 1) * 512)
112 #define CVMX_MIO_TWSX_SW_TWSI(offset) (CVMX_ADD_IO_SEG(0x0001180000001000ull) + ((offset) & 1) * 512)
113 #define CVMX_MIO_TWSX_SW_TWSI_EXT(offset) (CVMX_ADD_IO_SEG(0x0001180000001018ull) + ((offset) & 1) * 512)
114 #define CVMX_MIO_TWSX_TWSI_SW(offset) (CVMX_ADD_IO_SEG(0x0001180000001008ull) + ((offset) & 1) * 512)
115 #define CVMX_MIO_UART2_DLH (CVMX_ADD_IO_SEG(0x0001180000000488ull))
116 #define CVMX_MIO_UART2_DLL (CVMX_ADD_IO_SEG(0x0001180000000480ull))
117 #define CVMX_MIO_UART2_FAR (CVMX_ADD_IO_SEG(0x0001180000000520ull))
118 #define CVMX_MIO_UART2_FCR (CVMX_ADD_IO_SEG(0x0001180000000450ull))
119 #define CVMX_MIO_UART2_HTX (CVMX_ADD_IO_SEG(0x0001180000000708ull))
120 #define CVMX_MIO_UART2_IER (CVMX_ADD_IO_SEG(0x0001180000000408ull))
121 #define CVMX_MIO_UART2_IIR (CVMX_ADD_IO_SEG(0x0001180000000410ull))
122 #define CVMX_MIO_UART2_LCR (CVMX_ADD_IO_SEG(0x0001180000000418ull))
123 #define CVMX_MIO_UART2_LSR (CVMX_ADD_IO_SEG(0x0001180000000428ull))
124 #define CVMX_MIO_UART2_MCR (CVMX_ADD_IO_SEG(0x0001180000000420ull))
125 #define CVMX_MIO_UART2_MSR (CVMX_ADD_IO_SEG(0x0001180000000430ull))
126 #define CVMX_MIO_UART2_RBR (CVMX_ADD_IO_SEG(0x0001180000000400ull))
127 #define CVMX_MIO_UART2_RFL (CVMX_ADD_IO_SEG(0x0001180000000608ull))
128 #define CVMX_MIO_UART2_RFW (CVMX_ADD_IO_SEG(0x0001180000000530ull))
129 #define CVMX_MIO_UART2_SBCR (CVMX_ADD_IO_SEG(0x0001180000000620ull))
130 #define CVMX_MIO_UART2_SCR (CVMX_ADD_IO_SEG(0x0001180000000438ull))
131 #define CVMX_MIO_UART2_SFE (CVMX_ADD_IO_SEG(0x0001180000000630ull))
132 #define CVMX_MIO_UART2_SRR (CVMX_ADD_IO_SEG(0x0001180000000610ull))
133 #define CVMX_MIO_UART2_SRT (CVMX_ADD_IO_SEG(0x0001180000000638ull))
134 #define CVMX_MIO_UART2_SRTS (CVMX_ADD_IO_SEG(0x0001180000000618ull))
135 #define CVMX_MIO_UART2_STT (CVMX_ADD_IO_SEG(0x0001180000000700ull))
136 #define CVMX_MIO_UART2_TFL (CVMX_ADD_IO_SEG(0x0001180000000600ull))
137 #define CVMX_MIO_UART2_TFR (CVMX_ADD_IO_SEG(0x0001180000000528ull))
138 #define CVMX_MIO_UART2_THR (CVMX_ADD_IO_SEG(0x0001180000000440ull))
139 #define CVMX_MIO_UART2_USR (CVMX_ADD_IO_SEG(0x0001180000000538ull))
140 #define CVMX_MIO_UARTX_DLH(offset) (CVMX_ADD_IO_SEG(0x0001180000000888ull) + ((offset) & 1) * 1024)
141 #define CVMX_MIO_UARTX_DLL(offset) (CVMX_ADD_IO_SEG(0x0001180000000880ull) + ((offset) & 1) * 1024)
142 #define CVMX_MIO_UARTX_FAR(offset) (CVMX_ADD_IO_SEG(0x0001180000000920ull) + ((offset) & 1) * 1024)
143 #define CVMX_MIO_UARTX_FCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000850ull) + ((offset) & 1) * 1024)
144 #define CVMX_MIO_UARTX_HTX(offset) (CVMX_ADD_IO_SEG(0x0001180000000B08ull) + ((offset) & 1) * 1024)
145 #define CVMX_MIO_UARTX_IER(offset) (CVMX_ADD_IO_SEG(0x0001180000000808ull) + ((offset) & 1) * 1024)
146 #define CVMX_MIO_UARTX_IIR(offset) (CVMX_ADD_IO_SEG(0x0001180000000810ull) + ((offset) & 1) * 1024)
147 #define CVMX_MIO_UARTX_LCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000818ull) + ((offset) & 1) * 1024)
148 #define CVMX_MIO_UARTX_LSR(offset) (CVMX_ADD_IO_SEG(0x0001180000000828ull) + ((offset) & 1) * 1024)
149 #define CVMX_MIO_UARTX_MCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000820ull) + ((offset) & 1) * 1024)
150 #define CVMX_MIO_UARTX_MSR(offset) (CVMX_ADD_IO_SEG(0x0001180000000830ull) + ((offset) & 1) * 1024)
151 #define CVMX_MIO_UARTX_RBR(offset) (CVMX_ADD_IO_SEG(0x0001180000000800ull) + ((offset) & 1) * 1024)
152 #define CVMX_MIO_UARTX_RFL(offset) (CVMX_ADD_IO_SEG(0x0001180000000A08ull) + ((offset) & 1) * 1024)
153 #define CVMX_MIO_UARTX_RFW(offset) (CVMX_ADD_IO_SEG(0x0001180000000930ull) + ((offset) & 1) * 1024)
154 #define CVMX_MIO_UARTX_SBCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000A20ull) + ((offset) & 1) * 1024)
155 #define CVMX_MIO_UARTX_SCR(offset) (CVMX_ADD_IO_SEG(0x0001180000000838ull) + ((offset) & 1) * 1024)
156 #define CVMX_MIO_UARTX_SFE(offset) (CVMX_ADD_IO_SEG(0x0001180000000A30ull) + ((offset) & 1) * 1024)
157 #define CVMX_MIO_UARTX_SRR(offset) (CVMX_ADD_IO_SEG(0x0001180000000A10ull) + ((offset) & 1) * 1024)
158 #define CVMX_MIO_UARTX_SRT(offset) (CVMX_ADD_IO_SEG(0x0001180000000A38ull) + ((offset) & 1) * 1024)
159 #define CVMX_MIO_UARTX_SRTS(offset) (CVMX_ADD_IO_SEG(0x0001180000000A18ull) + ((offset) & 1) * 1024)
160 #define CVMX_MIO_UARTX_STT(offset) (CVMX_ADD_IO_SEG(0x0001180000000B00ull) + ((offset) & 1) * 1024)
161 #define CVMX_MIO_UARTX_TFL(offset) (CVMX_ADD_IO_SEG(0x0001180000000A00ull) + ((offset) & 1) * 1024)
162 #define CVMX_MIO_UARTX_TFR(offset) (CVMX_ADD_IO_SEG(0x0001180000000928ull) + ((offset) & 1) * 1024)
163 #define CVMX_MIO_UARTX_THR(offset) (CVMX_ADD_IO_SEG(0x0001180000000840ull) + ((offset) & 1) * 1024)
164 #define CVMX_MIO_UARTX_USR(offset) (CVMX_ADD_IO_SEG(0x0001180000000938ull) + ((offset) & 1) * 1024)
165 
166 union cvmx_mio_boot_bist_stat {
167 	uint64_t u64;
168 	struct cvmx_mio_boot_bist_stat_s {
169 		uint64_t reserved_0_63:64;
170 	} s;
171 	struct cvmx_mio_boot_bist_stat_cn30xx {
172 		uint64_t reserved_4_63:60;
173 		uint64_t ncbo_1:1;
174 		uint64_t ncbo_0:1;
175 		uint64_t loc:1;
176 		uint64_t ncbi:1;
177 	} cn30xx;
178 	struct cvmx_mio_boot_bist_stat_cn30xx cn31xx;
179 	struct cvmx_mio_boot_bist_stat_cn38xx {
180 		uint64_t reserved_3_63:61;
181 		uint64_t ncbo_0:1;
182 		uint64_t loc:1;
183 		uint64_t ncbi:1;
184 	} cn38xx;
185 	struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2;
186 	struct cvmx_mio_boot_bist_stat_cn50xx {
187 		uint64_t reserved_6_63:58;
188 		uint64_t pcm_1:1;
189 		uint64_t pcm_0:1;
190 		uint64_t ncbo_1:1;
191 		uint64_t ncbo_0:1;
192 		uint64_t loc:1;
193 		uint64_t ncbi:1;
194 	} cn50xx;
195 	struct cvmx_mio_boot_bist_stat_cn52xx {
196 		uint64_t reserved_6_63:58;
197 		uint64_t ndf:2;
198 		uint64_t ncbo_0:1;
199 		uint64_t dma:1;
200 		uint64_t loc:1;
201 		uint64_t ncbi:1;
202 	} cn52xx;
203 	struct cvmx_mio_boot_bist_stat_cn52xxp1 {
204 		uint64_t reserved_4_63:60;
205 		uint64_t ncbo_0:1;
206 		uint64_t dma:1;
207 		uint64_t loc:1;
208 		uint64_t ncbi:1;
209 	} cn52xxp1;
210 	struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx;
211 	struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1;
212 	struct cvmx_mio_boot_bist_stat_cn38xx cn58xx;
213 	struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1;
214 	struct cvmx_mio_boot_bist_stat_cn61xx {
215 		uint64_t reserved_12_63:52;
216 		uint64_t stat:12;
217 	} cn61xx;
218 	struct cvmx_mio_boot_bist_stat_cn63xx {
219 		uint64_t reserved_9_63:55;
220 		uint64_t stat:9;
221 	} cn63xx;
222 	struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1;
223 	struct cvmx_mio_boot_bist_stat_cn66xx {
224 		uint64_t reserved_10_63:54;
225 		uint64_t stat:10;
226 	} cn66xx;
227 	struct cvmx_mio_boot_bist_stat_cn66xx cn68xx;
228 	struct cvmx_mio_boot_bist_stat_cn66xx cn68xxp1;
229 };
230 
231 union cvmx_mio_boot_comp {
232 	uint64_t u64;
233 	struct cvmx_mio_boot_comp_s {
234 		uint64_t reserved_0_63:64;
235 	} s;
236 	struct cvmx_mio_boot_comp_cn50xx {
237 		uint64_t reserved_10_63:54;
238 		uint64_t pctl:5;
239 		uint64_t nctl:5;
240 	} cn50xx;
241 	struct cvmx_mio_boot_comp_cn50xx cn52xx;
242 	struct cvmx_mio_boot_comp_cn50xx cn52xxp1;
243 	struct cvmx_mio_boot_comp_cn50xx cn56xx;
244 	struct cvmx_mio_boot_comp_cn50xx cn56xxp1;
245 	struct cvmx_mio_boot_comp_cn61xx {
246 		uint64_t reserved_12_63:52;
247 		uint64_t pctl:6;
248 		uint64_t nctl:6;
249 	} cn61xx;
250 	struct cvmx_mio_boot_comp_cn61xx cn63xx;
251 	struct cvmx_mio_boot_comp_cn61xx cn63xxp1;
252 	struct cvmx_mio_boot_comp_cn61xx cn66xx;
253 	struct cvmx_mio_boot_comp_cn61xx cn68xx;
254 	struct cvmx_mio_boot_comp_cn61xx cn68xxp1;
255 };
256 
257 union cvmx_mio_boot_dma_cfgx {
258 	uint64_t u64;
259 	struct cvmx_mio_boot_dma_cfgx_s {
260 		uint64_t en:1;
261 		uint64_t rw:1;
262 		uint64_t clr:1;
263 		uint64_t reserved_60_60:1;
264 		uint64_t swap32:1;
265 		uint64_t swap16:1;
266 		uint64_t swap8:1;
267 		uint64_t endian:1;
268 		uint64_t size:20;
269 		uint64_t adr:36;
270 	} s;
271 	struct cvmx_mio_boot_dma_cfgx_s cn52xx;
272 	struct cvmx_mio_boot_dma_cfgx_s cn52xxp1;
273 	struct cvmx_mio_boot_dma_cfgx_s cn56xx;
274 	struct cvmx_mio_boot_dma_cfgx_s cn56xxp1;
275 	struct cvmx_mio_boot_dma_cfgx_s cn61xx;
276 	struct cvmx_mio_boot_dma_cfgx_s cn63xx;
277 	struct cvmx_mio_boot_dma_cfgx_s cn63xxp1;
278 	struct cvmx_mio_boot_dma_cfgx_s cn66xx;
279 	struct cvmx_mio_boot_dma_cfgx_s cn68xx;
280 	struct cvmx_mio_boot_dma_cfgx_s cn68xxp1;
281 };
282 
283 union cvmx_mio_boot_dma_intx {
284 	uint64_t u64;
285 	struct cvmx_mio_boot_dma_intx_s {
286 		uint64_t reserved_2_63:62;
287 		uint64_t dmarq:1;
288 		uint64_t done:1;
289 	} s;
290 	struct cvmx_mio_boot_dma_intx_s cn52xx;
291 	struct cvmx_mio_boot_dma_intx_s cn52xxp1;
292 	struct cvmx_mio_boot_dma_intx_s cn56xx;
293 	struct cvmx_mio_boot_dma_intx_s cn56xxp1;
294 	struct cvmx_mio_boot_dma_intx_s cn61xx;
295 	struct cvmx_mio_boot_dma_intx_s cn63xx;
296 	struct cvmx_mio_boot_dma_intx_s cn63xxp1;
297 	struct cvmx_mio_boot_dma_intx_s cn66xx;
298 	struct cvmx_mio_boot_dma_intx_s cn68xx;
299 	struct cvmx_mio_boot_dma_intx_s cn68xxp1;
300 };
301 
302 union cvmx_mio_boot_dma_int_enx {
303 	uint64_t u64;
304 	struct cvmx_mio_boot_dma_int_enx_s {
305 		uint64_t reserved_2_63:62;
306 		uint64_t dmarq:1;
307 		uint64_t done:1;
308 	} s;
309 	struct cvmx_mio_boot_dma_int_enx_s cn52xx;
310 	struct cvmx_mio_boot_dma_int_enx_s cn52xxp1;
311 	struct cvmx_mio_boot_dma_int_enx_s cn56xx;
312 	struct cvmx_mio_boot_dma_int_enx_s cn56xxp1;
313 	struct cvmx_mio_boot_dma_int_enx_s cn61xx;
314 	struct cvmx_mio_boot_dma_int_enx_s cn63xx;
315 	struct cvmx_mio_boot_dma_int_enx_s cn63xxp1;
316 	struct cvmx_mio_boot_dma_int_enx_s cn66xx;
317 	struct cvmx_mio_boot_dma_int_enx_s cn68xx;
318 	struct cvmx_mio_boot_dma_int_enx_s cn68xxp1;
319 };
320 
321 union cvmx_mio_boot_dma_timx {
322 	uint64_t u64;
323 	struct cvmx_mio_boot_dma_timx_s {
324 		uint64_t dmack_pi:1;
325 		uint64_t dmarq_pi:1;
326 		uint64_t tim_mult:2;
327 		uint64_t rd_dly:3;
328 		uint64_t ddr:1;
329 		uint64_t width:1;
330 		uint64_t reserved_48_54:7;
331 		uint64_t pause:6;
332 		uint64_t dmack_h:6;
333 		uint64_t we_n:6;
334 		uint64_t we_a:6;
335 		uint64_t oe_n:6;
336 		uint64_t oe_a:6;
337 		uint64_t dmack_s:6;
338 		uint64_t dmarq:6;
339 	} s;
340 	struct cvmx_mio_boot_dma_timx_s cn52xx;
341 	struct cvmx_mio_boot_dma_timx_s cn52xxp1;
342 	struct cvmx_mio_boot_dma_timx_s cn56xx;
343 	struct cvmx_mio_boot_dma_timx_s cn56xxp1;
344 	struct cvmx_mio_boot_dma_timx_s cn61xx;
345 	struct cvmx_mio_boot_dma_timx_s cn63xx;
346 	struct cvmx_mio_boot_dma_timx_s cn63xxp1;
347 	struct cvmx_mio_boot_dma_timx_s cn66xx;
348 	struct cvmx_mio_boot_dma_timx_s cn68xx;
349 	struct cvmx_mio_boot_dma_timx_s cn68xxp1;
350 };
351 
352 union cvmx_mio_boot_err {
353 	uint64_t u64;
354 	struct cvmx_mio_boot_err_s {
355 		uint64_t reserved_2_63:62;
356 		uint64_t wait_err:1;
357 		uint64_t adr_err:1;
358 	} s;
359 	struct cvmx_mio_boot_err_s cn30xx;
360 	struct cvmx_mio_boot_err_s cn31xx;
361 	struct cvmx_mio_boot_err_s cn38xx;
362 	struct cvmx_mio_boot_err_s cn38xxp2;
363 	struct cvmx_mio_boot_err_s cn50xx;
364 	struct cvmx_mio_boot_err_s cn52xx;
365 	struct cvmx_mio_boot_err_s cn52xxp1;
366 	struct cvmx_mio_boot_err_s cn56xx;
367 	struct cvmx_mio_boot_err_s cn56xxp1;
368 	struct cvmx_mio_boot_err_s cn58xx;
369 	struct cvmx_mio_boot_err_s cn58xxp1;
370 	struct cvmx_mio_boot_err_s cn61xx;
371 	struct cvmx_mio_boot_err_s cn63xx;
372 	struct cvmx_mio_boot_err_s cn63xxp1;
373 	struct cvmx_mio_boot_err_s cn66xx;
374 	struct cvmx_mio_boot_err_s cn68xx;
375 	struct cvmx_mio_boot_err_s cn68xxp1;
376 };
377 
378 union cvmx_mio_boot_int {
379 	uint64_t u64;
380 	struct cvmx_mio_boot_int_s {
381 		uint64_t reserved_2_63:62;
382 		uint64_t wait_int:1;
383 		uint64_t adr_int:1;
384 	} s;
385 	struct cvmx_mio_boot_int_s cn30xx;
386 	struct cvmx_mio_boot_int_s cn31xx;
387 	struct cvmx_mio_boot_int_s cn38xx;
388 	struct cvmx_mio_boot_int_s cn38xxp2;
389 	struct cvmx_mio_boot_int_s cn50xx;
390 	struct cvmx_mio_boot_int_s cn52xx;
391 	struct cvmx_mio_boot_int_s cn52xxp1;
392 	struct cvmx_mio_boot_int_s cn56xx;
393 	struct cvmx_mio_boot_int_s cn56xxp1;
394 	struct cvmx_mio_boot_int_s cn58xx;
395 	struct cvmx_mio_boot_int_s cn58xxp1;
396 	struct cvmx_mio_boot_int_s cn61xx;
397 	struct cvmx_mio_boot_int_s cn63xx;
398 	struct cvmx_mio_boot_int_s cn63xxp1;
399 	struct cvmx_mio_boot_int_s cn66xx;
400 	struct cvmx_mio_boot_int_s cn68xx;
401 	struct cvmx_mio_boot_int_s cn68xxp1;
402 };
403 
404 union cvmx_mio_boot_loc_adr {
405 	uint64_t u64;
406 	struct cvmx_mio_boot_loc_adr_s {
407 		uint64_t reserved_8_63:56;
408 		uint64_t adr:5;
409 		uint64_t reserved_0_2:3;
410 	} s;
411 	struct cvmx_mio_boot_loc_adr_s cn30xx;
412 	struct cvmx_mio_boot_loc_adr_s cn31xx;
413 	struct cvmx_mio_boot_loc_adr_s cn38xx;
414 	struct cvmx_mio_boot_loc_adr_s cn38xxp2;
415 	struct cvmx_mio_boot_loc_adr_s cn50xx;
416 	struct cvmx_mio_boot_loc_adr_s cn52xx;
417 	struct cvmx_mio_boot_loc_adr_s cn52xxp1;
418 	struct cvmx_mio_boot_loc_adr_s cn56xx;
419 	struct cvmx_mio_boot_loc_adr_s cn56xxp1;
420 	struct cvmx_mio_boot_loc_adr_s cn58xx;
421 	struct cvmx_mio_boot_loc_adr_s cn58xxp1;
422 	struct cvmx_mio_boot_loc_adr_s cn61xx;
423 	struct cvmx_mio_boot_loc_adr_s cn63xx;
424 	struct cvmx_mio_boot_loc_adr_s cn63xxp1;
425 	struct cvmx_mio_boot_loc_adr_s cn66xx;
426 	struct cvmx_mio_boot_loc_adr_s cn68xx;
427 	struct cvmx_mio_boot_loc_adr_s cn68xxp1;
428 };
429 
430 union cvmx_mio_boot_loc_cfgx {
431 	uint64_t u64;
432 	struct cvmx_mio_boot_loc_cfgx_s {
433 		uint64_t reserved_32_63:32;
434 		uint64_t en:1;
435 		uint64_t reserved_28_30:3;
436 		uint64_t base:25;
437 		uint64_t reserved_0_2:3;
438 	} s;
439 	struct cvmx_mio_boot_loc_cfgx_s cn30xx;
440 	struct cvmx_mio_boot_loc_cfgx_s cn31xx;
441 	struct cvmx_mio_boot_loc_cfgx_s cn38xx;
442 	struct cvmx_mio_boot_loc_cfgx_s cn38xxp2;
443 	struct cvmx_mio_boot_loc_cfgx_s cn50xx;
444 	struct cvmx_mio_boot_loc_cfgx_s cn52xx;
445 	struct cvmx_mio_boot_loc_cfgx_s cn52xxp1;
446 	struct cvmx_mio_boot_loc_cfgx_s cn56xx;
447 	struct cvmx_mio_boot_loc_cfgx_s cn56xxp1;
448 	struct cvmx_mio_boot_loc_cfgx_s cn58xx;
449 	struct cvmx_mio_boot_loc_cfgx_s cn58xxp1;
450 	struct cvmx_mio_boot_loc_cfgx_s cn61xx;
451 	struct cvmx_mio_boot_loc_cfgx_s cn63xx;
452 	struct cvmx_mio_boot_loc_cfgx_s cn63xxp1;
453 	struct cvmx_mio_boot_loc_cfgx_s cn66xx;
454 	struct cvmx_mio_boot_loc_cfgx_s cn68xx;
455 	struct cvmx_mio_boot_loc_cfgx_s cn68xxp1;
456 };
457 
458 union cvmx_mio_boot_loc_dat {
459 	uint64_t u64;
460 	struct cvmx_mio_boot_loc_dat_s {
461 		uint64_t data:64;
462 	} s;
463 	struct cvmx_mio_boot_loc_dat_s cn30xx;
464 	struct cvmx_mio_boot_loc_dat_s cn31xx;
465 	struct cvmx_mio_boot_loc_dat_s cn38xx;
466 	struct cvmx_mio_boot_loc_dat_s cn38xxp2;
467 	struct cvmx_mio_boot_loc_dat_s cn50xx;
468 	struct cvmx_mio_boot_loc_dat_s cn52xx;
469 	struct cvmx_mio_boot_loc_dat_s cn52xxp1;
470 	struct cvmx_mio_boot_loc_dat_s cn56xx;
471 	struct cvmx_mio_boot_loc_dat_s cn56xxp1;
472 	struct cvmx_mio_boot_loc_dat_s cn58xx;
473 	struct cvmx_mio_boot_loc_dat_s cn58xxp1;
474 	struct cvmx_mio_boot_loc_dat_s cn61xx;
475 	struct cvmx_mio_boot_loc_dat_s cn63xx;
476 	struct cvmx_mio_boot_loc_dat_s cn63xxp1;
477 	struct cvmx_mio_boot_loc_dat_s cn66xx;
478 	struct cvmx_mio_boot_loc_dat_s cn68xx;
479 	struct cvmx_mio_boot_loc_dat_s cn68xxp1;
480 };
481 
482 union cvmx_mio_boot_pin_defs {
483 	uint64_t u64;
484 	struct cvmx_mio_boot_pin_defs_s {
485 		uint64_t reserved_32_63:32;
486 		uint64_t user1:16;
487 		uint64_t ale:1;
488 		uint64_t width:1;
489 		uint64_t dmack_p2:1;
490 		uint64_t dmack_p1:1;
491 		uint64_t dmack_p0:1;
492 		uint64_t term:2;
493 		uint64_t nand:1;
494 		uint64_t user0:8;
495 	} s;
496 	struct cvmx_mio_boot_pin_defs_cn52xx {
497 		uint64_t reserved_16_63:48;
498 		uint64_t ale:1;
499 		uint64_t width:1;
500 		uint64_t reserved_13_13:1;
501 		uint64_t dmack_p1:1;
502 		uint64_t dmack_p0:1;
503 		uint64_t term:2;
504 		uint64_t nand:1;
505 		uint64_t reserved_0_7:8;
506 	} cn52xx;
507 	struct cvmx_mio_boot_pin_defs_cn56xx {
508 		uint64_t reserved_16_63:48;
509 		uint64_t ale:1;
510 		uint64_t width:1;
511 		uint64_t dmack_p2:1;
512 		uint64_t dmack_p1:1;
513 		uint64_t dmack_p0:1;
514 		uint64_t term:2;
515 		uint64_t reserved_0_8:9;
516 	} cn56xx;
517 	struct cvmx_mio_boot_pin_defs_cn61xx {
518 		uint64_t reserved_32_63:32;
519 		uint64_t user1:16;
520 		uint64_t ale:1;
521 		uint64_t width:1;
522 		uint64_t reserved_13_13:1;
523 		uint64_t dmack_p1:1;
524 		uint64_t dmack_p0:1;
525 		uint64_t term:2;
526 		uint64_t nand:1;
527 		uint64_t user0:8;
528 	} cn61xx;
529 	struct cvmx_mio_boot_pin_defs_cn52xx cn63xx;
530 	struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1;
531 	struct cvmx_mio_boot_pin_defs_cn52xx cn66xx;
532 	struct cvmx_mio_boot_pin_defs_cn52xx cn68xx;
533 	struct cvmx_mio_boot_pin_defs_cn52xx cn68xxp1;
534 };
535 
536 union cvmx_mio_boot_reg_cfgx {
537 	uint64_t u64;
538 	struct cvmx_mio_boot_reg_cfgx_s {
539 		uint64_t reserved_44_63:20;
540 		uint64_t dmack:2;
541 		uint64_t tim_mult:2;
542 		uint64_t rd_dly:3;
543 		uint64_t sam:1;
544 		uint64_t we_ext:2;
545 		uint64_t oe_ext:2;
546 		uint64_t en:1;
547 		uint64_t orbit:1;
548 		uint64_t ale:1;
549 		uint64_t width:1;
550 		uint64_t size:12;
551 		uint64_t base:16;
552 	} s;
553 	struct cvmx_mio_boot_reg_cfgx_cn30xx {
554 		uint64_t reserved_37_63:27;
555 		uint64_t sam:1;
556 		uint64_t we_ext:2;
557 		uint64_t oe_ext:2;
558 		uint64_t en:1;
559 		uint64_t orbit:1;
560 		uint64_t ale:1;
561 		uint64_t width:1;
562 		uint64_t size:12;
563 		uint64_t base:16;
564 	} cn30xx;
565 	struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx;
566 	struct cvmx_mio_boot_reg_cfgx_cn38xx {
567 		uint64_t reserved_32_63:32;
568 		uint64_t en:1;
569 		uint64_t orbit:1;
570 		uint64_t reserved_28_29:2;
571 		uint64_t size:12;
572 		uint64_t base:16;
573 	} cn38xx;
574 	struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2;
575 	struct cvmx_mio_boot_reg_cfgx_cn50xx {
576 		uint64_t reserved_42_63:22;
577 		uint64_t tim_mult:2;
578 		uint64_t rd_dly:3;
579 		uint64_t sam:1;
580 		uint64_t we_ext:2;
581 		uint64_t oe_ext:2;
582 		uint64_t en:1;
583 		uint64_t orbit:1;
584 		uint64_t ale:1;
585 		uint64_t width:1;
586 		uint64_t size:12;
587 		uint64_t base:16;
588 	} cn50xx;
589 	struct cvmx_mio_boot_reg_cfgx_s cn52xx;
590 	struct cvmx_mio_boot_reg_cfgx_s cn52xxp1;
591 	struct cvmx_mio_boot_reg_cfgx_s cn56xx;
592 	struct cvmx_mio_boot_reg_cfgx_s cn56xxp1;
593 	struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xx;
594 	struct cvmx_mio_boot_reg_cfgx_cn30xx cn58xxp1;
595 	struct cvmx_mio_boot_reg_cfgx_s cn61xx;
596 	struct cvmx_mio_boot_reg_cfgx_s cn63xx;
597 	struct cvmx_mio_boot_reg_cfgx_s cn63xxp1;
598 	struct cvmx_mio_boot_reg_cfgx_s cn66xx;
599 	struct cvmx_mio_boot_reg_cfgx_s cn68xx;
600 	struct cvmx_mio_boot_reg_cfgx_s cn68xxp1;
601 };
602 
603 union cvmx_mio_boot_reg_timx {
604 	uint64_t u64;
605 	struct cvmx_mio_boot_reg_timx_s {
606 		uint64_t pagem:1;
607 		uint64_t waitm:1;
608 		uint64_t pages:2;
609 		uint64_t ale:6;
610 		uint64_t page:6;
611 		uint64_t wait:6;
612 		uint64_t pause:6;
613 		uint64_t wr_hld:6;
614 		uint64_t rd_hld:6;
615 		uint64_t we:6;
616 		uint64_t oe:6;
617 		uint64_t ce:6;
618 		uint64_t adr:6;
619 	} s;
620 	struct cvmx_mio_boot_reg_timx_s cn30xx;
621 	struct cvmx_mio_boot_reg_timx_s cn31xx;
622 	struct cvmx_mio_boot_reg_timx_cn38xx {
623 		uint64_t pagem:1;
624 		uint64_t waitm:1;
625 		uint64_t pages:2;
626 		uint64_t reserved_54_59:6;
627 		uint64_t page:6;
628 		uint64_t wait:6;
629 		uint64_t pause:6;
630 		uint64_t wr_hld:6;
631 		uint64_t rd_hld:6;
632 		uint64_t we:6;
633 		uint64_t oe:6;
634 		uint64_t ce:6;
635 		uint64_t adr:6;
636 	} cn38xx;
637 	struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2;
638 	struct cvmx_mio_boot_reg_timx_s cn50xx;
639 	struct cvmx_mio_boot_reg_timx_s cn52xx;
640 	struct cvmx_mio_boot_reg_timx_s cn52xxp1;
641 	struct cvmx_mio_boot_reg_timx_s cn56xx;
642 	struct cvmx_mio_boot_reg_timx_s cn56xxp1;
643 	struct cvmx_mio_boot_reg_timx_s cn58xx;
644 	struct cvmx_mio_boot_reg_timx_s cn58xxp1;
645 	struct cvmx_mio_boot_reg_timx_s cn61xx;
646 	struct cvmx_mio_boot_reg_timx_s cn63xx;
647 	struct cvmx_mio_boot_reg_timx_s cn63xxp1;
648 	struct cvmx_mio_boot_reg_timx_s cn66xx;
649 	struct cvmx_mio_boot_reg_timx_s cn68xx;
650 	struct cvmx_mio_boot_reg_timx_s cn68xxp1;
651 };
652 
653 union cvmx_mio_boot_thr {
654 	uint64_t u64;
655 	struct cvmx_mio_boot_thr_s {
656 		uint64_t reserved_22_63:42;
657 		uint64_t dma_thr:6;
658 		uint64_t reserved_14_15:2;
659 		uint64_t fif_cnt:6;
660 		uint64_t reserved_6_7:2;
661 		uint64_t fif_thr:6;
662 	} s;
663 	struct cvmx_mio_boot_thr_cn30xx {
664 		uint64_t reserved_14_63:50;
665 		uint64_t fif_cnt:6;
666 		uint64_t reserved_6_7:2;
667 		uint64_t fif_thr:6;
668 	} cn30xx;
669 	struct cvmx_mio_boot_thr_cn30xx cn31xx;
670 	struct cvmx_mio_boot_thr_cn30xx cn38xx;
671 	struct cvmx_mio_boot_thr_cn30xx cn38xxp2;
672 	struct cvmx_mio_boot_thr_cn30xx cn50xx;
673 	struct cvmx_mio_boot_thr_s cn52xx;
674 	struct cvmx_mio_boot_thr_s cn52xxp1;
675 	struct cvmx_mio_boot_thr_s cn56xx;
676 	struct cvmx_mio_boot_thr_s cn56xxp1;
677 	struct cvmx_mio_boot_thr_cn30xx cn58xx;
678 	struct cvmx_mio_boot_thr_cn30xx cn58xxp1;
679 	struct cvmx_mio_boot_thr_s cn61xx;
680 	struct cvmx_mio_boot_thr_s cn63xx;
681 	struct cvmx_mio_boot_thr_s cn63xxp1;
682 	struct cvmx_mio_boot_thr_s cn66xx;
683 	struct cvmx_mio_boot_thr_s cn68xx;
684 	struct cvmx_mio_boot_thr_s cn68xxp1;
685 };
686 
687 union cvmx_mio_emm_buf_dat {
688 	uint64_t u64;
689 	struct cvmx_mio_emm_buf_dat_s {
690 		uint64_t dat:64;
691 	} s;
692 	struct cvmx_mio_emm_buf_dat_s cn61xx;
693 };
694 
695 union cvmx_mio_emm_buf_idx {
696 	uint64_t u64;
697 	struct cvmx_mio_emm_buf_idx_s {
698 		uint64_t reserved_17_63:47;
699 		uint64_t inc:1;
700 		uint64_t reserved_7_15:9;
701 		uint64_t buf_num:1;
702 		uint64_t offset:6;
703 	} s;
704 	struct cvmx_mio_emm_buf_idx_s cn61xx;
705 };
706 
707 union cvmx_mio_emm_cfg {
708 	uint64_t u64;
709 	struct cvmx_mio_emm_cfg_s {
710 		uint64_t reserved_17_63:47;
711 		uint64_t boot_fail:1;
712 		uint64_t reserved_4_15:12;
713 		uint64_t bus_ena:4;
714 	} s;
715 	struct cvmx_mio_emm_cfg_s cn61xx;
716 };
717 
718 union cvmx_mio_emm_cmd {
719 	uint64_t u64;
720 	struct cvmx_mio_emm_cmd_s {
721 		uint64_t reserved_62_63:2;
722 		uint64_t bus_id:2;
723 		uint64_t cmd_val:1;
724 		uint64_t reserved_56_58:3;
725 		uint64_t dbuf:1;
726 		uint64_t offset:6;
727 		uint64_t reserved_43_48:6;
728 		uint64_t ctype_xor:2;
729 		uint64_t rtype_xor:3;
730 		uint64_t cmd_idx:6;
731 		uint64_t arg:32;
732 	} s;
733 	struct cvmx_mio_emm_cmd_s cn61xx;
734 };
735 
736 union cvmx_mio_emm_dma {
737 	uint64_t u64;
738 	struct cvmx_mio_emm_dma_s {
739 		uint64_t reserved_62_63:2;
740 		uint64_t bus_id:2;
741 		uint64_t dma_val:1;
742 		uint64_t sector:1;
743 		uint64_t dat_null:1;
744 		uint64_t thres:6;
745 		uint64_t rel_wr:1;
746 		uint64_t rw:1;
747 		uint64_t multi:1;
748 		uint64_t block_cnt:16;
749 		uint64_t card_addr:32;
750 	} s;
751 	struct cvmx_mio_emm_dma_s cn61xx;
752 };
753 
754 union cvmx_mio_emm_int {
755 	uint64_t u64;
756 	struct cvmx_mio_emm_int_s {
757 		uint64_t reserved_7_63:57;
758 		uint64_t switch_err:1;
759 		uint64_t switch_done:1;
760 		uint64_t dma_err:1;
761 		uint64_t cmd_err:1;
762 		uint64_t dma_done:1;
763 		uint64_t cmd_done:1;
764 		uint64_t buf_done:1;
765 	} s;
766 	struct cvmx_mio_emm_int_s cn61xx;
767 };
768 
769 union cvmx_mio_emm_int_en {
770 	uint64_t u64;
771 	struct cvmx_mio_emm_int_en_s {
772 		uint64_t reserved_7_63:57;
773 		uint64_t switch_err:1;
774 		uint64_t switch_done:1;
775 		uint64_t dma_err:1;
776 		uint64_t cmd_err:1;
777 		uint64_t dma_done:1;
778 		uint64_t cmd_done:1;
779 		uint64_t buf_done:1;
780 	} s;
781 	struct cvmx_mio_emm_int_en_s cn61xx;
782 };
783 
784 union cvmx_mio_emm_modex {
785 	uint64_t u64;
786 	struct cvmx_mio_emm_modex_s {
787 		uint64_t reserved_49_63:15;
788 		uint64_t hs_timing:1;
789 		uint64_t reserved_43_47:5;
790 		uint64_t bus_width:3;
791 		uint64_t reserved_36_39:4;
792 		uint64_t power_class:4;
793 		uint64_t clk_hi:16;
794 		uint64_t clk_lo:16;
795 	} s;
796 	struct cvmx_mio_emm_modex_s cn61xx;
797 };
798 
799 union cvmx_mio_emm_rca {
800 	uint64_t u64;
801 	struct cvmx_mio_emm_rca_s {
802 		uint64_t reserved_16_63:48;
803 		uint64_t card_rca:16;
804 	} s;
805 	struct cvmx_mio_emm_rca_s cn61xx;
806 };
807 
808 union cvmx_mio_emm_rsp_hi {
809 	uint64_t u64;
810 	struct cvmx_mio_emm_rsp_hi_s {
811 		uint64_t dat:64;
812 	} s;
813 	struct cvmx_mio_emm_rsp_hi_s cn61xx;
814 };
815 
816 union cvmx_mio_emm_rsp_lo {
817 	uint64_t u64;
818 	struct cvmx_mio_emm_rsp_lo_s {
819 		uint64_t dat:64;
820 	} s;
821 	struct cvmx_mio_emm_rsp_lo_s cn61xx;
822 };
823 
824 union cvmx_mio_emm_rsp_sts {
825 	uint64_t u64;
826 	struct cvmx_mio_emm_rsp_sts_s {
827 		uint64_t reserved_62_63:2;
828 		uint64_t bus_id:2;
829 		uint64_t cmd_val:1;
830 		uint64_t switch_val:1;
831 		uint64_t dma_val:1;
832 		uint64_t dma_pend:1;
833 		uint64_t reserved_29_55:27;
834 		uint64_t dbuf_err:1;
835 		uint64_t reserved_24_27:4;
836 		uint64_t dbuf:1;
837 		uint64_t blk_timeout:1;
838 		uint64_t blk_crc_err:1;
839 		uint64_t rsp_busybit:1;
840 		uint64_t stp_timeout:1;
841 		uint64_t stp_crc_err:1;
842 		uint64_t stp_bad_sts:1;
843 		uint64_t stp_val:1;
844 		uint64_t rsp_timeout:1;
845 		uint64_t rsp_crc_err:1;
846 		uint64_t rsp_bad_sts:1;
847 		uint64_t rsp_val:1;
848 		uint64_t rsp_type:3;
849 		uint64_t cmd_type:2;
850 		uint64_t cmd_idx:6;
851 		uint64_t cmd_done:1;
852 	} s;
853 	struct cvmx_mio_emm_rsp_sts_s cn61xx;
854 };
855 
856 union cvmx_mio_emm_sample {
857 	uint64_t u64;
858 	struct cvmx_mio_emm_sample_s {
859 		uint64_t reserved_26_63:38;
860 		uint64_t cmd_cnt:10;
861 		uint64_t reserved_10_15:6;
862 		uint64_t dat_cnt:10;
863 	} s;
864 	struct cvmx_mio_emm_sample_s cn61xx;
865 };
866 
867 union cvmx_mio_emm_sts_mask {
868 	uint64_t u64;
869 	struct cvmx_mio_emm_sts_mask_s {
870 		uint64_t reserved_32_63:32;
871 		uint64_t sts_msk:32;
872 	} s;
873 	struct cvmx_mio_emm_sts_mask_s cn61xx;
874 };
875 
876 union cvmx_mio_emm_switch {
877 	uint64_t u64;
878 	struct cvmx_mio_emm_switch_s {
879 		uint64_t reserved_62_63:2;
880 		uint64_t bus_id:2;
881 		uint64_t switch_exe:1;
882 		uint64_t switch_err0:1;
883 		uint64_t switch_err1:1;
884 		uint64_t switch_err2:1;
885 		uint64_t reserved_49_55:7;
886 		uint64_t hs_timing:1;
887 		uint64_t reserved_43_47:5;
888 		uint64_t bus_width:3;
889 		uint64_t reserved_36_39:4;
890 		uint64_t power_class:4;
891 		uint64_t clk_hi:16;
892 		uint64_t clk_lo:16;
893 	} s;
894 	struct cvmx_mio_emm_switch_s cn61xx;
895 };
896 
897 union cvmx_mio_emm_wdog {
898 	uint64_t u64;
899 	struct cvmx_mio_emm_wdog_s {
900 		uint64_t reserved_26_63:38;
901 		uint64_t clk_cnt:26;
902 	} s;
903 	struct cvmx_mio_emm_wdog_s cn61xx;
904 };
905 
906 union cvmx_mio_fus_bnk_datx {
907 	uint64_t u64;
908 	struct cvmx_mio_fus_bnk_datx_s {
909 		uint64_t dat:64;
910 	} s;
911 	struct cvmx_mio_fus_bnk_datx_s cn50xx;
912 	struct cvmx_mio_fus_bnk_datx_s cn52xx;
913 	struct cvmx_mio_fus_bnk_datx_s cn52xxp1;
914 	struct cvmx_mio_fus_bnk_datx_s cn56xx;
915 	struct cvmx_mio_fus_bnk_datx_s cn56xxp1;
916 	struct cvmx_mio_fus_bnk_datx_s cn58xx;
917 	struct cvmx_mio_fus_bnk_datx_s cn58xxp1;
918 	struct cvmx_mio_fus_bnk_datx_s cn61xx;
919 	struct cvmx_mio_fus_bnk_datx_s cn63xx;
920 	struct cvmx_mio_fus_bnk_datx_s cn63xxp1;
921 	struct cvmx_mio_fus_bnk_datx_s cn66xx;
922 	struct cvmx_mio_fus_bnk_datx_s cn68xx;
923 	struct cvmx_mio_fus_bnk_datx_s cn68xxp1;
924 };
925 
926 union cvmx_mio_fus_dat0 {
927 	uint64_t u64;
928 	struct cvmx_mio_fus_dat0_s {
929 		uint64_t reserved_32_63:32;
930 		uint64_t man_info:32;
931 	} s;
932 	struct cvmx_mio_fus_dat0_s cn30xx;
933 	struct cvmx_mio_fus_dat0_s cn31xx;
934 	struct cvmx_mio_fus_dat0_s cn38xx;
935 	struct cvmx_mio_fus_dat0_s cn38xxp2;
936 	struct cvmx_mio_fus_dat0_s cn50xx;
937 	struct cvmx_mio_fus_dat0_s cn52xx;
938 	struct cvmx_mio_fus_dat0_s cn52xxp1;
939 	struct cvmx_mio_fus_dat0_s cn56xx;
940 	struct cvmx_mio_fus_dat0_s cn56xxp1;
941 	struct cvmx_mio_fus_dat0_s cn58xx;
942 	struct cvmx_mio_fus_dat0_s cn58xxp1;
943 	struct cvmx_mio_fus_dat0_s cn61xx;
944 	struct cvmx_mio_fus_dat0_s cn63xx;
945 	struct cvmx_mio_fus_dat0_s cn63xxp1;
946 	struct cvmx_mio_fus_dat0_s cn66xx;
947 	struct cvmx_mio_fus_dat0_s cn68xx;
948 	struct cvmx_mio_fus_dat0_s cn68xxp1;
949 };
950 
951 union cvmx_mio_fus_dat1 {
952 	uint64_t u64;
953 	struct cvmx_mio_fus_dat1_s {
954 		uint64_t reserved_32_63:32;
955 		uint64_t man_info:32;
956 	} s;
957 	struct cvmx_mio_fus_dat1_s cn30xx;
958 	struct cvmx_mio_fus_dat1_s cn31xx;
959 	struct cvmx_mio_fus_dat1_s cn38xx;
960 	struct cvmx_mio_fus_dat1_s cn38xxp2;
961 	struct cvmx_mio_fus_dat1_s cn50xx;
962 	struct cvmx_mio_fus_dat1_s cn52xx;
963 	struct cvmx_mio_fus_dat1_s cn52xxp1;
964 	struct cvmx_mio_fus_dat1_s cn56xx;
965 	struct cvmx_mio_fus_dat1_s cn56xxp1;
966 	struct cvmx_mio_fus_dat1_s cn58xx;
967 	struct cvmx_mio_fus_dat1_s cn58xxp1;
968 	struct cvmx_mio_fus_dat1_s cn61xx;
969 	struct cvmx_mio_fus_dat1_s cn63xx;
970 	struct cvmx_mio_fus_dat1_s cn63xxp1;
971 	struct cvmx_mio_fus_dat1_s cn66xx;
972 	struct cvmx_mio_fus_dat1_s cn68xx;
973 	struct cvmx_mio_fus_dat1_s cn68xxp1;
974 };
975 
976 union cvmx_mio_fus_dat2 {
977 	uint64_t u64;
978 	struct cvmx_mio_fus_dat2_s {
979 		uint64_t reserved_48_63:16;
980 		uint64_t fus118:1;
981 		uint64_t rom_info:10;
982 		uint64_t power_limit:2;
983 		uint64_t dorm_crypto:1;
984 		uint64_t fus318:1;
985 		uint64_t raid_en:1;
986 		uint64_t reserved_30_31:2;
987 		uint64_t nokasu:1;
988 		uint64_t nodfa_cp2:1;
989 		uint64_t nomul:1;
990 		uint64_t nocrypto:1;
991 		uint64_t rst_sht:1;
992 		uint64_t bist_dis:1;
993 		uint64_t chip_id:8;
994 		uint64_t reserved_0_15:16;
995 	} s;
996 	struct cvmx_mio_fus_dat2_cn30xx {
997 		uint64_t reserved_29_63:35;
998 		uint64_t nodfa_cp2:1;
999 		uint64_t nomul:1;
1000 		uint64_t nocrypto:1;
1001 		uint64_t rst_sht:1;
1002 		uint64_t bist_dis:1;
1003 		uint64_t chip_id:8;
1004 		uint64_t pll_off:4;
1005 		uint64_t reserved_1_11:11;
1006 		uint64_t pp_dis:1;
1007 	} cn30xx;
1008 	struct cvmx_mio_fus_dat2_cn31xx {
1009 		uint64_t reserved_29_63:35;
1010 		uint64_t nodfa_cp2:1;
1011 		uint64_t nomul:1;
1012 		uint64_t nocrypto:1;
1013 		uint64_t rst_sht:1;
1014 		uint64_t bist_dis:1;
1015 		uint64_t chip_id:8;
1016 		uint64_t pll_off:4;
1017 		uint64_t reserved_2_11:10;
1018 		uint64_t pp_dis:2;
1019 	} cn31xx;
1020 	struct cvmx_mio_fus_dat2_cn38xx {
1021 		uint64_t reserved_29_63:35;
1022 		uint64_t nodfa_cp2:1;
1023 		uint64_t nomul:1;
1024 		uint64_t nocrypto:1;
1025 		uint64_t rst_sht:1;
1026 		uint64_t bist_dis:1;
1027 		uint64_t chip_id:8;
1028 		uint64_t pp_dis:16;
1029 	} cn38xx;
1030 	struct cvmx_mio_fus_dat2_cn38xx cn38xxp2;
1031 	struct cvmx_mio_fus_dat2_cn50xx {
1032 		uint64_t reserved_34_63:30;
1033 		uint64_t fus318:1;
1034 		uint64_t raid_en:1;
1035 		uint64_t reserved_30_31:2;
1036 		uint64_t nokasu:1;
1037 		uint64_t nodfa_cp2:1;
1038 		uint64_t nomul:1;
1039 		uint64_t nocrypto:1;
1040 		uint64_t rst_sht:1;
1041 		uint64_t bist_dis:1;
1042 		uint64_t chip_id:8;
1043 		uint64_t reserved_2_15:14;
1044 		uint64_t pp_dis:2;
1045 	} cn50xx;
1046 	struct cvmx_mio_fus_dat2_cn52xx {
1047 		uint64_t reserved_34_63:30;
1048 		uint64_t fus318:1;
1049 		uint64_t raid_en:1;
1050 		uint64_t reserved_30_31:2;
1051 		uint64_t nokasu:1;
1052 		uint64_t nodfa_cp2:1;
1053 		uint64_t nomul:1;
1054 		uint64_t nocrypto:1;
1055 		uint64_t rst_sht:1;
1056 		uint64_t bist_dis:1;
1057 		uint64_t chip_id:8;
1058 		uint64_t reserved_4_15:12;
1059 		uint64_t pp_dis:4;
1060 	} cn52xx;
1061 	struct cvmx_mio_fus_dat2_cn52xx cn52xxp1;
1062 	struct cvmx_mio_fus_dat2_cn56xx {
1063 		uint64_t reserved_34_63:30;
1064 		uint64_t fus318:1;
1065 		uint64_t raid_en:1;
1066 		uint64_t reserved_30_31:2;
1067 		uint64_t nokasu:1;
1068 		uint64_t nodfa_cp2:1;
1069 		uint64_t nomul:1;
1070 		uint64_t nocrypto:1;
1071 		uint64_t rst_sht:1;
1072 		uint64_t bist_dis:1;
1073 		uint64_t chip_id:8;
1074 		uint64_t reserved_12_15:4;
1075 		uint64_t pp_dis:12;
1076 	} cn56xx;
1077 	struct cvmx_mio_fus_dat2_cn56xx cn56xxp1;
1078 	struct cvmx_mio_fus_dat2_cn58xx {
1079 		uint64_t reserved_30_63:34;
1080 		uint64_t nokasu:1;
1081 		uint64_t nodfa_cp2:1;
1082 		uint64_t nomul:1;
1083 		uint64_t nocrypto:1;
1084 		uint64_t rst_sht:1;
1085 		uint64_t bist_dis:1;
1086 		uint64_t chip_id:8;
1087 		uint64_t pp_dis:16;
1088 	} cn58xx;
1089 	struct cvmx_mio_fus_dat2_cn58xx cn58xxp1;
1090 	struct cvmx_mio_fus_dat2_cn61xx {
1091 		uint64_t reserved_48_63:16;
1092 		uint64_t fus118:1;
1093 		uint64_t rom_info:10;
1094 		uint64_t power_limit:2;
1095 		uint64_t dorm_crypto:1;
1096 		uint64_t fus318:1;
1097 		uint64_t raid_en:1;
1098 		uint64_t reserved_29_31:3;
1099 		uint64_t nodfa_cp2:1;
1100 		uint64_t nomul:1;
1101 		uint64_t nocrypto:1;
1102 		uint64_t reserved_24_25:2;
1103 		uint64_t chip_id:8;
1104 		uint64_t reserved_4_15:12;
1105 		uint64_t pp_dis:4;
1106 	} cn61xx;
1107 	struct cvmx_mio_fus_dat2_cn63xx {
1108 		uint64_t reserved_35_63:29;
1109 		uint64_t dorm_crypto:1;
1110 		uint64_t fus318:1;
1111 		uint64_t raid_en:1;
1112 		uint64_t reserved_29_31:3;
1113 		uint64_t nodfa_cp2:1;
1114 		uint64_t nomul:1;
1115 		uint64_t nocrypto:1;
1116 		uint64_t reserved_24_25:2;
1117 		uint64_t chip_id:8;
1118 		uint64_t reserved_6_15:10;
1119 		uint64_t pp_dis:6;
1120 	} cn63xx;
1121 	struct cvmx_mio_fus_dat2_cn63xx cn63xxp1;
1122 	struct cvmx_mio_fus_dat2_cn66xx {
1123 		uint64_t reserved_48_63:16;
1124 		uint64_t fus118:1;
1125 		uint64_t rom_info:10;
1126 		uint64_t power_limit:2;
1127 		uint64_t dorm_crypto:1;
1128 		uint64_t fus318:1;
1129 		uint64_t raid_en:1;
1130 		uint64_t reserved_29_31:3;
1131 		uint64_t nodfa_cp2:1;
1132 		uint64_t nomul:1;
1133 		uint64_t nocrypto:1;
1134 		uint64_t reserved_24_25:2;
1135 		uint64_t chip_id:8;
1136 		uint64_t reserved_10_15:6;
1137 		uint64_t pp_dis:10;
1138 	} cn66xx;
1139 	struct cvmx_mio_fus_dat2_cn68xx {
1140 		uint64_t reserved_37_63:27;
1141 		uint64_t power_limit:2;
1142 		uint64_t dorm_crypto:1;
1143 		uint64_t fus318:1;
1144 		uint64_t raid_en:1;
1145 		uint64_t reserved_29_31:3;
1146 		uint64_t nodfa_cp2:1;
1147 		uint64_t nomul:1;
1148 		uint64_t nocrypto:1;
1149 		uint64_t reserved_24_25:2;
1150 		uint64_t chip_id:8;
1151 		uint64_t reserved_0_15:16;
1152 	} cn68xx;
1153 	struct cvmx_mio_fus_dat2_cn68xx cn68xxp1;
1154 };
1155 
1156 union cvmx_mio_fus_dat3 {
1157 	uint64_t u64;
1158 	struct cvmx_mio_fus_dat3_s {
1159 		uint64_t reserved_58_63:6;
1160 		uint64_t pll_ctl:10;
1161 		uint64_t dfa_info_dte:3;
1162 		uint64_t dfa_info_clm:4;
1163 		uint64_t reserved_40_40:1;
1164 		uint64_t ema:2;
1165 		uint64_t efus_lck_rsv:1;
1166 		uint64_t efus_lck_man:1;
1167 		uint64_t pll_half_dis:1;
1168 		uint64_t l2c_crip:3;
1169 		uint64_t pll_div4:1;
1170 		uint64_t reserved_29_30:2;
1171 		uint64_t bar2_en:1;
1172 		uint64_t efus_lck:1;
1173 		uint64_t efus_ign:1;
1174 		uint64_t nozip:1;
1175 		uint64_t nodfa_dte:1;
1176 		uint64_t icache:24;
1177 	} s;
1178 	struct cvmx_mio_fus_dat3_cn30xx {
1179 		uint64_t reserved_32_63:32;
1180 		uint64_t pll_div4:1;
1181 		uint64_t reserved_29_30:2;
1182 		uint64_t bar2_en:1;
1183 		uint64_t efus_lck:1;
1184 		uint64_t efus_ign:1;
1185 		uint64_t nozip:1;
1186 		uint64_t nodfa_dte:1;
1187 		uint64_t icache:24;
1188 	} cn30xx;
1189 	struct cvmx_mio_fus_dat3_cn31xx {
1190 		uint64_t reserved_32_63:32;
1191 		uint64_t pll_div4:1;
1192 		uint64_t zip_crip:2;
1193 		uint64_t bar2_en:1;
1194 		uint64_t efus_lck:1;
1195 		uint64_t efus_ign:1;
1196 		uint64_t nozip:1;
1197 		uint64_t nodfa_dte:1;
1198 		uint64_t icache:24;
1199 	} cn31xx;
1200 	struct cvmx_mio_fus_dat3_cn38xx {
1201 		uint64_t reserved_31_63:33;
1202 		uint64_t zip_crip:2;
1203 		uint64_t bar2_en:1;
1204 		uint64_t efus_lck:1;
1205 		uint64_t efus_ign:1;
1206 		uint64_t nozip:1;
1207 		uint64_t nodfa_dte:1;
1208 		uint64_t icache:24;
1209 	} cn38xx;
1210 	struct cvmx_mio_fus_dat3_cn38xxp2 {
1211 		uint64_t reserved_29_63:35;
1212 		uint64_t bar2_en:1;
1213 		uint64_t efus_lck:1;
1214 		uint64_t efus_ign:1;
1215 		uint64_t nozip:1;
1216 		uint64_t nodfa_dte:1;
1217 		uint64_t icache:24;
1218 	} cn38xxp2;
1219 	struct cvmx_mio_fus_dat3_cn38xx cn50xx;
1220 	struct cvmx_mio_fus_dat3_cn38xx cn52xx;
1221 	struct cvmx_mio_fus_dat3_cn38xx cn52xxp1;
1222 	struct cvmx_mio_fus_dat3_cn38xx cn56xx;
1223 	struct cvmx_mio_fus_dat3_cn38xx cn56xxp1;
1224 	struct cvmx_mio_fus_dat3_cn38xx cn58xx;
1225 	struct cvmx_mio_fus_dat3_cn38xx cn58xxp1;
1226 	struct cvmx_mio_fus_dat3_cn61xx {
1227 		uint64_t reserved_58_63:6;
1228 		uint64_t pll_ctl:10;
1229 		uint64_t dfa_info_dte:3;
1230 		uint64_t dfa_info_clm:4;
1231 		uint64_t reserved_40_40:1;
1232 		uint64_t ema:2;
1233 		uint64_t efus_lck_rsv:1;
1234 		uint64_t efus_lck_man:1;
1235 		uint64_t pll_half_dis:1;
1236 		uint64_t l2c_crip:3;
1237 		uint64_t reserved_31_31:1;
1238 		uint64_t zip_info:2;
1239 		uint64_t bar2_en:1;
1240 		uint64_t efus_lck:1;
1241 		uint64_t efus_ign:1;
1242 		uint64_t nozip:1;
1243 		uint64_t nodfa_dte:1;
1244 		uint64_t reserved_0_23:24;
1245 	} cn61xx;
1246 	struct cvmx_mio_fus_dat3_cn61xx cn63xx;
1247 	struct cvmx_mio_fus_dat3_cn61xx cn63xxp1;
1248 	struct cvmx_mio_fus_dat3_cn61xx cn66xx;
1249 	struct cvmx_mio_fus_dat3_cn61xx cn68xx;
1250 	struct cvmx_mio_fus_dat3_cn61xx cn68xxp1;
1251 };
1252 
1253 union cvmx_mio_fus_ema {
1254 	uint64_t u64;
1255 	struct cvmx_mio_fus_ema_s {
1256 		uint64_t reserved_7_63:57;
1257 		uint64_t eff_ema:3;
1258 		uint64_t reserved_3_3:1;
1259 		uint64_t ema:3;
1260 	} s;
1261 	struct cvmx_mio_fus_ema_s cn50xx;
1262 	struct cvmx_mio_fus_ema_s cn52xx;
1263 	struct cvmx_mio_fus_ema_s cn52xxp1;
1264 	struct cvmx_mio_fus_ema_s cn56xx;
1265 	struct cvmx_mio_fus_ema_s cn56xxp1;
1266 	struct cvmx_mio_fus_ema_cn58xx {
1267 		uint64_t reserved_2_63:62;
1268 		uint64_t ema:2;
1269 	} cn58xx;
1270 	struct cvmx_mio_fus_ema_cn58xx cn58xxp1;
1271 	struct cvmx_mio_fus_ema_s cn61xx;
1272 	struct cvmx_mio_fus_ema_s cn63xx;
1273 	struct cvmx_mio_fus_ema_s cn63xxp1;
1274 	struct cvmx_mio_fus_ema_s cn66xx;
1275 	struct cvmx_mio_fus_ema_s cn68xx;
1276 	struct cvmx_mio_fus_ema_s cn68xxp1;
1277 };
1278 
1279 union cvmx_mio_fus_pdf {
1280 	uint64_t u64;
1281 	struct cvmx_mio_fus_pdf_s {
1282 		uint64_t pdf:64;
1283 	} s;
1284 	struct cvmx_mio_fus_pdf_s cn50xx;
1285 	struct cvmx_mio_fus_pdf_s cn52xx;
1286 	struct cvmx_mio_fus_pdf_s cn52xxp1;
1287 	struct cvmx_mio_fus_pdf_s cn56xx;
1288 	struct cvmx_mio_fus_pdf_s cn56xxp1;
1289 	struct cvmx_mio_fus_pdf_s cn58xx;
1290 	struct cvmx_mio_fus_pdf_s cn61xx;
1291 	struct cvmx_mio_fus_pdf_s cn63xx;
1292 	struct cvmx_mio_fus_pdf_s cn63xxp1;
1293 	struct cvmx_mio_fus_pdf_s cn66xx;
1294 	struct cvmx_mio_fus_pdf_s cn68xx;
1295 	struct cvmx_mio_fus_pdf_s cn68xxp1;
1296 };
1297 
1298 union cvmx_mio_fus_pll {
1299 	uint64_t u64;
1300 	struct cvmx_mio_fus_pll_s {
1301 		uint64_t reserved_48_63:16;
1302 		uint64_t rclk_align_r:8;
1303 		uint64_t rclk_align_l:8;
1304 		uint64_t reserved_8_31:24;
1305 		uint64_t c_cout_rst:1;
1306 		uint64_t c_cout_sel:2;
1307 		uint64_t pnr_cout_rst:1;
1308 		uint64_t pnr_cout_sel:2;
1309 		uint64_t rfslip:1;
1310 		uint64_t fbslip:1;
1311 	} s;
1312 	struct cvmx_mio_fus_pll_cn50xx {
1313 		uint64_t reserved_2_63:62;
1314 		uint64_t rfslip:1;
1315 		uint64_t fbslip:1;
1316 	} cn50xx;
1317 	struct cvmx_mio_fus_pll_cn50xx cn52xx;
1318 	struct cvmx_mio_fus_pll_cn50xx cn52xxp1;
1319 	struct cvmx_mio_fus_pll_cn50xx cn56xx;
1320 	struct cvmx_mio_fus_pll_cn50xx cn56xxp1;
1321 	struct cvmx_mio_fus_pll_cn50xx cn58xx;
1322 	struct cvmx_mio_fus_pll_cn50xx cn58xxp1;
1323 	struct cvmx_mio_fus_pll_cn61xx {
1324 		uint64_t reserved_8_63:56;
1325 		uint64_t c_cout_rst:1;
1326 		uint64_t c_cout_sel:2;
1327 		uint64_t pnr_cout_rst:1;
1328 		uint64_t pnr_cout_sel:2;
1329 		uint64_t rfslip:1;
1330 		uint64_t fbslip:1;
1331 	} cn61xx;
1332 	struct cvmx_mio_fus_pll_cn61xx cn63xx;
1333 	struct cvmx_mio_fus_pll_cn61xx cn63xxp1;
1334 	struct cvmx_mio_fus_pll_cn61xx cn66xx;
1335 	struct cvmx_mio_fus_pll_s cn68xx;
1336 	struct cvmx_mio_fus_pll_s cn68xxp1;
1337 };
1338 
1339 union cvmx_mio_fus_prog {
1340 	uint64_t u64;
1341 	struct cvmx_mio_fus_prog_s {
1342 		uint64_t reserved_2_63:62;
1343 		uint64_t soft:1;
1344 		uint64_t prog:1;
1345 	} s;
1346 	struct cvmx_mio_fus_prog_cn30xx {
1347 		uint64_t reserved_1_63:63;
1348 		uint64_t prog:1;
1349 	} cn30xx;
1350 	struct cvmx_mio_fus_prog_cn30xx cn31xx;
1351 	struct cvmx_mio_fus_prog_cn30xx cn38xx;
1352 	struct cvmx_mio_fus_prog_cn30xx cn38xxp2;
1353 	struct cvmx_mio_fus_prog_cn30xx cn50xx;
1354 	struct cvmx_mio_fus_prog_cn30xx cn52xx;
1355 	struct cvmx_mio_fus_prog_cn30xx cn52xxp1;
1356 	struct cvmx_mio_fus_prog_cn30xx cn56xx;
1357 	struct cvmx_mio_fus_prog_cn30xx cn56xxp1;
1358 	struct cvmx_mio_fus_prog_cn30xx cn58xx;
1359 	struct cvmx_mio_fus_prog_cn30xx cn58xxp1;
1360 	struct cvmx_mio_fus_prog_s cn61xx;
1361 	struct cvmx_mio_fus_prog_s cn63xx;
1362 	struct cvmx_mio_fus_prog_s cn63xxp1;
1363 	struct cvmx_mio_fus_prog_s cn66xx;
1364 	struct cvmx_mio_fus_prog_s cn68xx;
1365 	struct cvmx_mio_fus_prog_s cn68xxp1;
1366 };
1367 
1368 union cvmx_mio_fus_prog_times {
1369 	uint64_t u64;
1370 	struct cvmx_mio_fus_prog_times_s {
1371 		uint64_t reserved_35_63:29;
1372 		uint64_t vgate_pin:1;
1373 		uint64_t fsrc_pin:1;
1374 		uint64_t prog_pin:1;
1375 		uint64_t reserved_6_31:26;
1376 		uint64_t setup:6;
1377 	} s;
1378 	struct cvmx_mio_fus_prog_times_cn50xx {
1379 		uint64_t reserved_33_63:31;
1380 		uint64_t prog_pin:1;
1381 		uint64_t out:8;
1382 		uint64_t sclk_lo:4;
1383 		uint64_t sclk_hi:12;
1384 		uint64_t setup:8;
1385 	} cn50xx;
1386 	struct cvmx_mio_fus_prog_times_cn50xx cn52xx;
1387 	struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1;
1388 	struct cvmx_mio_fus_prog_times_cn50xx cn56xx;
1389 	struct cvmx_mio_fus_prog_times_cn50xx cn56xxp1;
1390 	struct cvmx_mio_fus_prog_times_cn50xx cn58xx;
1391 	struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1;
1392 	struct cvmx_mio_fus_prog_times_cn61xx {
1393 		uint64_t reserved_35_63:29;
1394 		uint64_t vgate_pin:1;
1395 		uint64_t fsrc_pin:1;
1396 		uint64_t prog_pin:1;
1397 		uint64_t out:7;
1398 		uint64_t sclk_lo:4;
1399 		uint64_t sclk_hi:15;
1400 		uint64_t setup:6;
1401 	} cn61xx;
1402 	struct cvmx_mio_fus_prog_times_cn61xx cn63xx;
1403 	struct cvmx_mio_fus_prog_times_cn61xx cn63xxp1;
1404 	struct cvmx_mio_fus_prog_times_cn61xx cn66xx;
1405 	struct cvmx_mio_fus_prog_times_cn61xx cn68xx;
1406 	struct cvmx_mio_fus_prog_times_cn61xx cn68xxp1;
1407 };
1408 
1409 union cvmx_mio_fus_rcmd {
1410 	uint64_t u64;
1411 	struct cvmx_mio_fus_rcmd_s {
1412 		uint64_t reserved_24_63:40;
1413 		uint64_t dat:8;
1414 		uint64_t reserved_13_15:3;
1415 		uint64_t pend:1;
1416 		uint64_t reserved_9_11:3;
1417 		uint64_t efuse:1;
1418 		uint64_t addr:8;
1419 	} s;
1420 	struct cvmx_mio_fus_rcmd_cn30xx {
1421 		uint64_t reserved_24_63:40;
1422 		uint64_t dat:8;
1423 		uint64_t reserved_13_15:3;
1424 		uint64_t pend:1;
1425 		uint64_t reserved_9_11:3;
1426 		uint64_t efuse:1;
1427 		uint64_t reserved_7_7:1;
1428 		uint64_t addr:7;
1429 	} cn30xx;
1430 	struct cvmx_mio_fus_rcmd_cn30xx cn31xx;
1431 	struct cvmx_mio_fus_rcmd_cn30xx cn38xx;
1432 	struct cvmx_mio_fus_rcmd_cn30xx cn38xxp2;
1433 	struct cvmx_mio_fus_rcmd_cn30xx cn50xx;
1434 	struct cvmx_mio_fus_rcmd_s cn52xx;
1435 	struct cvmx_mio_fus_rcmd_s cn52xxp1;
1436 	struct cvmx_mio_fus_rcmd_s cn56xx;
1437 	struct cvmx_mio_fus_rcmd_s cn56xxp1;
1438 	struct cvmx_mio_fus_rcmd_cn30xx cn58xx;
1439 	struct cvmx_mio_fus_rcmd_cn30xx cn58xxp1;
1440 	struct cvmx_mio_fus_rcmd_s cn61xx;
1441 	struct cvmx_mio_fus_rcmd_s cn63xx;
1442 	struct cvmx_mio_fus_rcmd_s cn63xxp1;
1443 	struct cvmx_mio_fus_rcmd_s cn66xx;
1444 	struct cvmx_mio_fus_rcmd_s cn68xx;
1445 	struct cvmx_mio_fus_rcmd_s cn68xxp1;
1446 };
1447 
1448 union cvmx_mio_fus_read_times {
1449 	uint64_t u64;
1450 	struct cvmx_mio_fus_read_times_s {
1451 		uint64_t reserved_26_63:38;
1452 		uint64_t sch:4;
1453 		uint64_t fsh:4;
1454 		uint64_t prh:4;
1455 		uint64_t sdh:4;
1456 		uint64_t setup:10;
1457 	} s;
1458 	struct cvmx_mio_fus_read_times_s cn61xx;
1459 	struct cvmx_mio_fus_read_times_s cn63xx;
1460 	struct cvmx_mio_fus_read_times_s cn63xxp1;
1461 	struct cvmx_mio_fus_read_times_s cn66xx;
1462 	struct cvmx_mio_fus_read_times_s cn68xx;
1463 	struct cvmx_mio_fus_read_times_s cn68xxp1;
1464 };
1465 
1466 union cvmx_mio_fus_repair_res0 {
1467 	uint64_t u64;
1468 	struct cvmx_mio_fus_repair_res0_s {
1469 		uint64_t reserved_55_63:9;
1470 		uint64_t too_many:1;
1471 		uint64_t repair2:18;
1472 		uint64_t repair1:18;
1473 		uint64_t repair0:18;
1474 	} s;
1475 	struct cvmx_mio_fus_repair_res0_s cn61xx;
1476 	struct cvmx_mio_fus_repair_res0_s cn63xx;
1477 	struct cvmx_mio_fus_repair_res0_s cn63xxp1;
1478 	struct cvmx_mio_fus_repair_res0_s cn66xx;
1479 	struct cvmx_mio_fus_repair_res0_s cn68xx;
1480 	struct cvmx_mio_fus_repair_res0_s cn68xxp1;
1481 };
1482 
1483 union cvmx_mio_fus_repair_res1 {
1484 	uint64_t u64;
1485 	struct cvmx_mio_fus_repair_res1_s {
1486 		uint64_t reserved_54_63:10;
1487 		uint64_t repair5:18;
1488 		uint64_t repair4:18;
1489 		uint64_t repair3:18;
1490 	} s;
1491 	struct cvmx_mio_fus_repair_res1_s cn61xx;
1492 	struct cvmx_mio_fus_repair_res1_s cn63xx;
1493 	struct cvmx_mio_fus_repair_res1_s cn63xxp1;
1494 	struct cvmx_mio_fus_repair_res1_s cn66xx;
1495 	struct cvmx_mio_fus_repair_res1_s cn68xx;
1496 	struct cvmx_mio_fus_repair_res1_s cn68xxp1;
1497 };
1498 
1499 union cvmx_mio_fus_repair_res2 {
1500 	uint64_t u64;
1501 	struct cvmx_mio_fus_repair_res2_s {
1502 		uint64_t reserved_18_63:46;
1503 		uint64_t repair6:18;
1504 	} s;
1505 	struct cvmx_mio_fus_repair_res2_s cn61xx;
1506 	struct cvmx_mio_fus_repair_res2_s cn63xx;
1507 	struct cvmx_mio_fus_repair_res2_s cn63xxp1;
1508 	struct cvmx_mio_fus_repair_res2_s cn66xx;
1509 	struct cvmx_mio_fus_repair_res2_s cn68xx;
1510 	struct cvmx_mio_fus_repair_res2_s cn68xxp1;
1511 };
1512 
1513 union cvmx_mio_fus_spr_repair_res {
1514 	uint64_t u64;
1515 	struct cvmx_mio_fus_spr_repair_res_s {
1516 		uint64_t reserved_42_63:22;
1517 		uint64_t repair2:14;
1518 		uint64_t repair1:14;
1519 		uint64_t repair0:14;
1520 	} s;
1521 	struct cvmx_mio_fus_spr_repair_res_s cn30xx;
1522 	struct cvmx_mio_fus_spr_repair_res_s cn31xx;
1523 	struct cvmx_mio_fus_spr_repair_res_s cn38xx;
1524 	struct cvmx_mio_fus_spr_repair_res_s cn50xx;
1525 	struct cvmx_mio_fus_spr_repair_res_s cn52xx;
1526 	struct cvmx_mio_fus_spr_repair_res_s cn52xxp1;
1527 	struct cvmx_mio_fus_spr_repair_res_s cn56xx;
1528 	struct cvmx_mio_fus_spr_repair_res_s cn56xxp1;
1529 	struct cvmx_mio_fus_spr_repair_res_s cn58xx;
1530 	struct cvmx_mio_fus_spr_repair_res_s cn58xxp1;
1531 	struct cvmx_mio_fus_spr_repair_res_s cn61xx;
1532 	struct cvmx_mio_fus_spr_repair_res_s cn63xx;
1533 	struct cvmx_mio_fus_spr_repair_res_s cn63xxp1;
1534 	struct cvmx_mio_fus_spr_repair_res_s cn66xx;
1535 	struct cvmx_mio_fus_spr_repair_res_s cn68xx;
1536 	struct cvmx_mio_fus_spr_repair_res_s cn68xxp1;
1537 };
1538 
1539 union cvmx_mio_fus_spr_repair_sum {
1540 	uint64_t u64;
1541 	struct cvmx_mio_fus_spr_repair_sum_s {
1542 		uint64_t reserved_1_63:63;
1543 		uint64_t too_many:1;
1544 	} s;
1545 	struct cvmx_mio_fus_spr_repair_sum_s cn30xx;
1546 	struct cvmx_mio_fus_spr_repair_sum_s cn31xx;
1547 	struct cvmx_mio_fus_spr_repair_sum_s cn38xx;
1548 	struct cvmx_mio_fus_spr_repair_sum_s cn50xx;
1549 	struct cvmx_mio_fus_spr_repair_sum_s cn52xx;
1550 	struct cvmx_mio_fus_spr_repair_sum_s cn52xxp1;
1551 	struct cvmx_mio_fus_spr_repair_sum_s cn56xx;
1552 	struct cvmx_mio_fus_spr_repair_sum_s cn56xxp1;
1553 	struct cvmx_mio_fus_spr_repair_sum_s cn58xx;
1554 	struct cvmx_mio_fus_spr_repair_sum_s cn58xxp1;
1555 	struct cvmx_mio_fus_spr_repair_sum_s cn61xx;
1556 	struct cvmx_mio_fus_spr_repair_sum_s cn63xx;
1557 	struct cvmx_mio_fus_spr_repair_sum_s cn63xxp1;
1558 	struct cvmx_mio_fus_spr_repair_sum_s cn66xx;
1559 	struct cvmx_mio_fus_spr_repair_sum_s cn68xx;
1560 	struct cvmx_mio_fus_spr_repair_sum_s cn68xxp1;
1561 };
1562 
1563 union cvmx_mio_fus_tgg {
1564 	uint64_t u64;
1565 	struct cvmx_mio_fus_tgg_s {
1566 		uint64_t val:1;
1567 		uint64_t dat:63;
1568 	} s;
1569 	struct cvmx_mio_fus_tgg_s cn61xx;
1570 	struct cvmx_mio_fus_tgg_s cn66xx;
1571 };
1572 
1573 union cvmx_mio_fus_unlock {
1574 	uint64_t u64;
1575 	struct cvmx_mio_fus_unlock_s {
1576 		uint64_t reserved_24_63:40;
1577 		uint64_t key:24;
1578 	} s;
1579 	struct cvmx_mio_fus_unlock_s cn30xx;
1580 	struct cvmx_mio_fus_unlock_s cn31xx;
1581 };
1582 
1583 union cvmx_mio_fus_wadr {
1584 	uint64_t u64;
1585 	struct cvmx_mio_fus_wadr_s {
1586 		uint64_t reserved_10_63:54;
1587 		uint64_t addr:10;
1588 	} s;
1589 	struct cvmx_mio_fus_wadr_s cn30xx;
1590 	struct cvmx_mio_fus_wadr_s cn31xx;
1591 	struct cvmx_mio_fus_wadr_s cn38xx;
1592 	struct cvmx_mio_fus_wadr_s cn38xxp2;
1593 	struct cvmx_mio_fus_wadr_cn50xx {
1594 		uint64_t reserved_2_63:62;
1595 		uint64_t addr:2;
1596 	} cn50xx;
1597 	struct cvmx_mio_fus_wadr_cn52xx {
1598 		uint64_t reserved_3_63:61;
1599 		uint64_t addr:3;
1600 	} cn52xx;
1601 	struct cvmx_mio_fus_wadr_cn52xx cn52xxp1;
1602 	struct cvmx_mio_fus_wadr_cn52xx cn56xx;
1603 	struct cvmx_mio_fus_wadr_cn52xx cn56xxp1;
1604 	struct cvmx_mio_fus_wadr_cn50xx cn58xx;
1605 	struct cvmx_mio_fus_wadr_cn50xx cn58xxp1;
1606 	struct cvmx_mio_fus_wadr_cn61xx {
1607 		uint64_t reserved_4_63:60;
1608 		uint64_t addr:4;
1609 	} cn61xx;
1610 	struct cvmx_mio_fus_wadr_cn61xx cn63xx;
1611 	struct cvmx_mio_fus_wadr_cn61xx cn63xxp1;
1612 	struct cvmx_mio_fus_wadr_cn61xx cn66xx;
1613 	struct cvmx_mio_fus_wadr_cn61xx cn68xx;
1614 	struct cvmx_mio_fus_wadr_cn61xx cn68xxp1;
1615 };
1616 
1617 union cvmx_mio_gpio_comp {
1618 	uint64_t u64;
1619 	struct cvmx_mio_gpio_comp_s {
1620 		uint64_t reserved_12_63:52;
1621 		uint64_t pctl:6;
1622 		uint64_t nctl:6;
1623 	} s;
1624 	struct cvmx_mio_gpio_comp_s cn61xx;
1625 	struct cvmx_mio_gpio_comp_s cn63xx;
1626 	struct cvmx_mio_gpio_comp_s cn63xxp1;
1627 	struct cvmx_mio_gpio_comp_s cn66xx;
1628 	struct cvmx_mio_gpio_comp_s cn68xx;
1629 	struct cvmx_mio_gpio_comp_s cn68xxp1;
1630 };
1631 
1632 union cvmx_mio_ndf_dma_cfg {
1633 	uint64_t u64;
1634 	struct cvmx_mio_ndf_dma_cfg_s {
1635 		uint64_t en:1;
1636 		uint64_t rw:1;
1637 		uint64_t clr:1;
1638 		uint64_t reserved_60_60:1;
1639 		uint64_t swap32:1;
1640 		uint64_t swap16:1;
1641 		uint64_t swap8:1;
1642 		uint64_t endian:1;
1643 		uint64_t size:20;
1644 		uint64_t adr:36;
1645 	} s;
1646 	struct cvmx_mio_ndf_dma_cfg_s cn52xx;
1647 	struct cvmx_mio_ndf_dma_cfg_s cn61xx;
1648 	struct cvmx_mio_ndf_dma_cfg_s cn63xx;
1649 	struct cvmx_mio_ndf_dma_cfg_s cn63xxp1;
1650 	struct cvmx_mio_ndf_dma_cfg_s cn66xx;
1651 	struct cvmx_mio_ndf_dma_cfg_s cn68xx;
1652 	struct cvmx_mio_ndf_dma_cfg_s cn68xxp1;
1653 };
1654 
1655 union cvmx_mio_ndf_dma_int {
1656 	uint64_t u64;
1657 	struct cvmx_mio_ndf_dma_int_s {
1658 		uint64_t reserved_1_63:63;
1659 		uint64_t done:1;
1660 	} s;
1661 	struct cvmx_mio_ndf_dma_int_s cn52xx;
1662 	struct cvmx_mio_ndf_dma_int_s cn61xx;
1663 	struct cvmx_mio_ndf_dma_int_s cn63xx;
1664 	struct cvmx_mio_ndf_dma_int_s cn63xxp1;
1665 	struct cvmx_mio_ndf_dma_int_s cn66xx;
1666 	struct cvmx_mio_ndf_dma_int_s cn68xx;
1667 	struct cvmx_mio_ndf_dma_int_s cn68xxp1;
1668 };
1669 
1670 union cvmx_mio_ndf_dma_int_en {
1671 	uint64_t u64;
1672 	struct cvmx_mio_ndf_dma_int_en_s {
1673 		uint64_t reserved_1_63:63;
1674 		uint64_t done:1;
1675 	} s;
1676 	struct cvmx_mio_ndf_dma_int_en_s cn52xx;
1677 	struct cvmx_mio_ndf_dma_int_en_s cn61xx;
1678 	struct cvmx_mio_ndf_dma_int_en_s cn63xx;
1679 	struct cvmx_mio_ndf_dma_int_en_s cn63xxp1;
1680 	struct cvmx_mio_ndf_dma_int_en_s cn66xx;
1681 	struct cvmx_mio_ndf_dma_int_en_s cn68xx;
1682 	struct cvmx_mio_ndf_dma_int_en_s cn68xxp1;
1683 };
1684 
1685 union cvmx_mio_pll_ctl {
1686 	uint64_t u64;
1687 	struct cvmx_mio_pll_ctl_s {
1688 		uint64_t reserved_5_63:59;
1689 		uint64_t bw_ctl:5;
1690 	} s;
1691 	struct cvmx_mio_pll_ctl_s cn30xx;
1692 	struct cvmx_mio_pll_ctl_s cn31xx;
1693 };
1694 
1695 union cvmx_mio_pll_setting {
1696 	uint64_t u64;
1697 	struct cvmx_mio_pll_setting_s {
1698 		uint64_t reserved_17_63:47;
1699 		uint64_t setting:17;
1700 	} s;
1701 	struct cvmx_mio_pll_setting_s cn30xx;
1702 	struct cvmx_mio_pll_setting_s cn31xx;
1703 };
1704 
1705 union cvmx_mio_ptp_ckout_hi_incr {
1706 	uint64_t u64;
1707 	struct cvmx_mio_ptp_ckout_hi_incr_s {
1708 		uint64_t nanosec:32;
1709 		uint64_t frnanosec:32;
1710 	} s;
1711 	struct cvmx_mio_ptp_ckout_hi_incr_s cn61xx;
1712 	struct cvmx_mio_ptp_ckout_hi_incr_s cn66xx;
1713 	struct cvmx_mio_ptp_ckout_hi_incr_s cn68xx;
1714 };
1715 
1716 union cvmx_mio_ptp_ckout_lo_incr {
1717 	uint64_t u64;
1718 	struct cvmx_mio_ptp_ckout_lo_incr_s {
1719 		uint64_t nanosec:32;
1720 		uint64_t frnanosec:32;
1721 	} s;
1722 	struct cvmx_mio_ptp_ckout_lo_incr_s cn61xx;
1723 	struct cvmx_mio_ptp_ckout_lo_incr_s cn66xx;
1724 	struct cvmx_mio_ptp_ckout_lo_incr_s cn68xx;
1725 };
1726 
1727 union cvmx_mio_ptp_ckout_thresh_hi {
1728 	uint64_t u64;
1729 	struct cvmx_mio_ptp_ckout_thresh_hi_s {
1730 		uint64_t nanosec:64;
1731 	} s;
1732 	struct cvmx_mio_ptp_ckout_thresh_hi_s cn61xx;
1733 	struct cvmx_mio_ptp_ckout_thresh_hi_s cn66xx;
1734 	struct cvmx_mio_ptp_ckout_thresh_hi_s cn68xx;
1735 };
1736 
1737 union cvmx_mio_ptp_ckout_thresh_lo {
1738 	uint64_t u64;
1739 	struct cvmx_mio_ptp_ckout_thresh_lo_s {
1740 		uint64_t reserved_32_63:32;
1741 		uint64_t frnanosec:32;
1742 	} s;
1743 	struct cvmx_mio_ptp_ckout_thresh_lo_s cn61xx;
1744 	struct cvmx_mio_ptp_ckout_thresh_lo_s cn66xx;
1745 	struct cvmx_mio_ptp_ckout_thresh_lo_s cn68xx;
1746 };
1747 
1748 union cvmx_mio_ptp_clock_cfg {
1749 	uint64_t u64;
1750 	struct cvmx_mio_ptp_clock_cfg_s {
1751 		uint64_t reserved_42_63:22;
1752 		uint64_t pps:1;
1753 		uint64_t ckout:1;
1754 		uint64_t ext_clk_edge:2;
1755 		uint64_t ckout_out4:1;
1756 		uint64_t pps_out:5;
1757 		uint64_t pps_inv:1;
1758 		uint64_t pps_en:1;
1759 		uint64_t ckout_out:4;
1760 		uint64_t ckout_inv:1;
1761 		uint64_t ckout_en:1;
1762 		uint64_t evcnt_in:6;
1763 		uint64_t evcnt_edge:1;
1764 		uint64_t evcnt_en:1;
1765 		uint64_t tstmp_in:6;
1766 		uint64_t tstmp_edge:1;
1767 		uint64_t tstmp_en:1;
1768 		uint64_t ext_clk_in:6;
1769 		uint64_t ext_clk_en:1;
1770 		uint64_t ptp_en:1;
1771 	} s;
1772 	struct cvmx_mio_ptp_clock_cfg_s cn61xx;
1773 	struct cvmx_mio_ptp_clock_cfg_cn63xx {
1774 		uint64_t reserved_24_63:40;
1775 		uint64_t evcnt_in:6;
1776 		uint64_t evcnt_edge:1;
1777 		uint64_t evcnt_en:1;
1778 		uint64_t tstmp_in:6;
1779 		uint64_t tstmp_edge:1;
1780 		uint64_t tstmp_en:1;
1781 		uint64_t ext_clk_in:6;
1782 		uint64_t ext_clk_en:1;
1783 		uint64_t ptp_en:1;
1784 	} cn63xx;
1785 	struct cvmx_mio_ptp_clock_cfg_cn63xx cn63xxp1;
1786 	struct cvmx_mio_ptp_clock_cfg_cn66xx {
1787 		uint64_t reserved_40_63:24;
1788 		uint64_t ext_clk_edge:2;
1789 		uint64_t ckout_out4:1;
1790 		uint64_t pps_out:5;
1791 		uint64_t pps_inv:1;
1792 		uint64_t pps_en:1;
1793 		uint64_t ckout_out:4;
1794 		uint64_t ckout_inv:1;
1795 		uint64_t ckout_en:1;
1796 		uint64_t evcnt_in:6;
1797 		uint64_t evcnt_edge:1;
1798 		uint64_t evcnt_en:1;
1799 		uint64_t tstmp_in:6;
1800 		uint64_t tstmp_edge:1;
1801 		uint64_t tstmp_en:1;
1802 		uint64_t ext_clk_in:6;
1803 		uint64_t ext_clk_en:1;
1804 		uint64_t ptp_en:1;
1805 	} cn66xx;
1806 	struct cvmx_mio_ptp_clock_cfg_s cn68xx;
1807 	struct cvmx_mio_ptp_clock_cfg_cn63xx cn68xxp1;
1808 };
1809 
1810 union cvmx_mio_ptp_clock_comp {
1811 	uint64_t u64;
1812 	struct cvmx_mio_ptp_clock_comp_s {
1813 		uint64_t nanosec:32;
1814 		uint64_t frnanosec:32;
1815 	} s;
1816 	struct cvmx_mio_ptp_clock_comp_s cn61xx;
1817 	struct cvmx_mio_ptp_clock_comp_s cn63xx;
1818 	struct cvmx_mio_ptp_clock_comp_s cn63xxp1;
1819 	struct cvmx_mio_ptp_clock_comp_s cn66xx;
1820 	struct cvmx_mio_ptp_clock_comp_s cn68xx;
1821 	struct cvmx_mio_ptp_clock_comp_s cn68xxp1;
1822 };
1823 
1824 union cvmx_mio_ptp_clock_hi {
1825 	uint64_t u64;
1826 	struct cvmx_mio_ptp_clock_hi_s {
1827 		uint64_t nanosec:64;
1828 	} s;
1829 	struct cvmx_mio_ptp_clock_hi_s cn61xx;
1830 	struct cvmx_mio_ptp_clock_hi_s cn63xx;
1831 	struct cvmx_mio_ptp_clock_hi_s cn63xxp1;
1832 	struct cvmx_mio_ptp_clock_hi_s cn66xx;
1833 	struct cvmx_mio_ptp_clock_hi_s cn68xx;
1834 	struct cvmx_mio_ptp_clock_hi_s cn68xxp1;
1835 };
1836 
1837 union cvmx_mio_ptp_clock_lo {
1838 	uint64_t u64;
1839 	struct cvmx_mio_ptp_clock_lo_s {
1840 		uint64_t reserved_32_63:32;
1841 		uint64_t frnanosec:32;
1842 	} s;
1843 	struct cvmx_mio_ptp_clock_lo_s cn61xx;
1844 	struct cvmx_mio_ptp_clock_lo_s cn63xx;
1845 	struct cvmx_mio_ptp_clock_lo_s cn63xxp1;
1846 	struct cvmx_mio_ptp_clock_lo_s cn66xx;
1847 	struct cvmx_mio_ptp_clock_lo_s cn68xx;
1848 	struct cvmx_mio_ptp_clock_lo_s cn68xxp1;
1849 };
1850 
1851 union cvmx_mio_ptp_evt_cnt {
1852 	uint64_t u64;
1853 	struct cvmx_mio_ptp_evt_cnt_s {
1854 		uint64_t cntr:64;
1855 	} s;
1856 	struct cvmx_mio_ptp_evt_cnt_s cn61xx;
1857 	struct cvmx_mio_ptp_evt_cnt_s cn63xx;
1858 	struct cvmx_mio_ptp_evt_cnt_s cn63xxp1;
1859 	struct cvmx_mio_ptp_evt_cnt_s cn66xx;
1860 	struct cvmx_mio_ptp_evt_cnt_s cn68xx;
1861 	struct cvmx_mio_ptp_evt_cnt_s cn68xxp1;
1862 };
1863 
1864 union cvmx_mio_ptp_pps_hi_incr {
1865 	uint64_t u64;
1866 	struct cvmx_mio_ptp_pps_hi_incr_s {
1867 		uint64_t nanosec:32;
1868 		uint64_t frnanosec:32;
1869 	} s;
1870 	struct cvmx_mio_ptp_pps_hi_incr_s cn61xx;
1871 	struct cvmx_mio_ptp_pps_hi_incr_s cn66xx;
1872 	struct cvmx_mio_ptp_pps_hi_incr_s cn68xx;
1873 };
1874 
1875 union cvmx_mio_ptp_pps_lo_incr {
1876 	uint64_t u64;
1877 	struct cvmx_mio_ptp_pps_lo_incr_s {
1878 		uint64_t nanosec:32;
1879 		uint64_t frnanosec:32;
1880 	} s;
1881 	struct cvmx_mio_ptp_pps_lo_incr_s cn61xx;
1882 	struct cvmx_mio_ptp_pps_lo_incr_s cn66xx;
1883 	struct cvmx_mio_ptp_pps_lo_incr_s cn68xx;
1884 };
1885 
1886 union cvmx_mio_ptp_pps_thresh_hi {
1887 	uint64_t u64;
1888 	struct cvmx_mio_ptp_pps_thresh_hi_s {
1889 		uint64_t nanosec:64;
1890 	} s;
1891 	struct cvmx_mio_ptp_pps_thresh_hi_s cn61xx;
1892 	struct cvmx_mio_ptp_pps_thresh_hi_s cn66xx;
1893 	struct cvmx_mio_ptp_pps_thresh_hi_s cn68xx;
1894 };
1895 
1896 union cvmx_mio_ptp_pps_thresh_lo {
1897 	uint64_t u64;
1898 	struct cvmx_mio_ptp_pps_thresh_lo_s {
1899 		uint64_t reserved_32_63:32;
1900 		uint64_t frnanosec:32;
1901 	} s;
1902 	struct cvmx_mio_ptp_pps_thresh_lo_s cn61xx;
1903 	struct cvmx_mio_ptp_pps_thresh_lo_s cn66xx;
1904 	struct cvmx_mio_ptp_pps_thresh_lo_s cn68xx;
1905 };
1906 
1907 union cvmx_mio_ptp_timestamp {
1908 	uint64_t u64;
1909 	struct cvmx_mio_ptp_timestamp_s {
1910 		uint64_t nanosec:64;
1911 	} s;
1912 	struct cvmx_mio_ptp_timestamp_s cn61xx;
1913 	struct cvmx_mio_ptp_timestamp_s cn63xx;
1914 	struct cvmx_mio_ptp_timestamp_s cn63xxp1;
1915 	struct cvmx_mio_ptp_timestamp_s cn66xx;
1916 	struct cvmx_mio_ptp_timestamp_s cn68xx;
1917 	struct cvmx_mio_ptp_timestamp_s cn68xxp1;
1918 };
1919 
1920 union cvmx_mio_qlmx_cfg {
1921 	uint64_t u64;
1922 	struct cvmx_mio_qlmx_cfg_s {
1923 		uint64_t reserved_12_63:52;
1924 		uint64_t qlm_spd:4;
1925 		uint64_t reserved_4_7:4;
1926 		uint64_t qlm_cfg:4;
1927 	} s;
1928 	struct cvmx_mio_qlmx_cfg_cn61xx {
1929 		uint64_t reserved_12_63:52;
1930 		uint64_t qlm_spd:4;
1931 		uint64_t reserved_2_7:6;
1932 		uint64_t qlm_cfg:2;
1933 	} cn61xx;
1934 	struct cvmx_mio_qlmx_cfg_s cn66xx;
1935 	struct cvmx_mio_qlmx_cfg_cn68xx {
1936 		uint64_t reserved_12_63:52;
1937 		uint64_t qlm_spd:4;
1938 		uint64_t reserved_3_7:5;
1939 		uint64_t qlm_cfg:3;
1940 	} cn68xx;
1941 	struct cvmx_mio_qlmx_cfg_cn68xx cn68xxp1;
1942 };
1943 
1944 union cvmx_mio_rst_boot {
1945 	uint64_t u64;
1946 	struct cvmx_mio_rst_boot_s {
1947 		uint64_t chipkill:1;
1948 		uint64_t jtcsrdis:1;
1949 		uint64_t ejtagdis:1;
1950 		uint64_t romen:1;
1951 		uint64_t ckill_ppdis:1;
1952 		uint64_t jt_tstmode:1;
1953 		uint64_t reserved_50_57:8;
1954 		uint64_t lboot_ext:2;
1955 		uint64_t reserved_44_47:4;
1956 		uint64_t qlm4_spd:4;
1957 		uint64_t qlm3_spd:4;
1958 		uint64_t c_mul:6;
1959 		uint64_t pnr_mul:6;
1960 		uint64_t qlm2_spd:4;
1961 		uint64_t qlm1_spd:4;
1962 		uint64_t qlm0_spd:4;
1963 		uint64_t lboot:10;
1964 		uint64_t rboot:1;
1965 		uint64_t rboot_pin:1;
1966 	} s;
1967 	struct cvmx_mio_rst_boot_cn61xx {
1968 		uint64_t chipkill:1;
1969 		uint64_t jtcsrdis:1;
1970 		uint64_t ejtagdis:1;
1971 		uint64_t romen:1;
1972 		uint64_t ckill_ppdis:1;
1973 		uint64_t jt_tstmode:1;
1974 		uint64_t reserved_50_57:8;
1975 		uint64_t lboot_ext:2;
1976 		uint64_t reserved_36_47:12;
1977 		uint64_t c_mul:6;
1978 		uint64_t pnr_mul:6;
1979 		uint64_t qlm2_spd:4;
1980 		uint64_t qlm1_spd:4;
1981 		uint64_t qlm0_spd:4;
1982 		uint64_t lboot:10;
1983 		uint64_t rboot:1;
1984 		uint64_t rboot_pin:1;
1985 	} cn61xx;
1986 	struct cvmx_mio_rst_boot_cn63xx {
1987 		uint64_t reserved_36_63:28;
1988 		uint64_t c_mul:6;
1989 		uint64_t pnr_mul:6;
1990 		uint64_t qlm2_spd:4;
1991 		uint64_t qlm1_spd:4;
1992 		uint64_t qlm0_spd:4;
1993 		uint64_t lboot:10;
1994 		uint64_t rboot:1;
1995 		uint64_t rboot_pin:1;
1996 	} cn63xx;
1997 	struct cvmx_mio_rst_boot_cn63xx cn63xxp1;
1998 	struct cvmx_mio_rst_boot_cn66xx {
1999 		uint64_t chipkill:1;
2000 		uint64_t jtcsrdis:1;
2001 		uint64_t ejtagdis:1;
2002 		uint64_t romen:1;
2003 		uint64_t ckill_ppdis:1;
2004 		uint64_t reserved_50_58:9;
2005 		uint64_t lboot_ext:2;
2006 		uint64_t reserved_36_47:12;
2007 		uint64_t c_mul:6;
2008 		uint64_t pnr_mul:6;
2009 		uint64_t qlm2_spd:4;
2010 		uint64_t qlm1_spd:4;
2011 		uint64_t qlm0_spd:4;
2012 		uint64_t lboot:10;
2013 		uint64_t rboot:1;
2014 		uint64_t rboot_pin:1;
2015 	} cn66xx;
2016 	struct cvmx_mio_rst_boot_cn68xx {
2017 		uint64_t reserved_59_63:5;
2018 		uint64_t jt_tstmode:1;
2019 		uint64_t reserved_44_57:14;
2020 		uint64_t qlm4_spd:4;
2021 		uint64_t qlm3_spd:4;
2022 		uint64_t c_mul:6;
2023 		uint64_t pnr_mul:6;
2024 		uint64_t qlm2_spd:4;
2025 		uint64_t qlm1_spd:4;
2026 		uint64_t qlm0_spd:4;
2027 		uint64_t lboot:10;
2028 		uint64_t rboot:1;
2029 		uint64_t rboot_pin:1;
2030 	} cn68xx;
2031 	struct cvmx_mio_rst_boot_cn68xxp1 {
2032 		uint64_t reserved_44_63:20;
2033 		uint64_t qlm4_spd:4;
2034 		uint64_t qlm3_spd:4;
2035 		uint64_t c_mul:6;
2036 		uint64_t pnr_mul:6;
2037 		uint64_t qlm2_spd:4;
2038 		uint64_t qlm1_spd:4;
2039 		uint64_t qlm0_spd:4;
2040 		uint64_t lboot:10;
2041 		uint64_t rboot:1;
2042 		uint64_t rboot_pin:1;
2043 	} cn68xxp1;
2044 };
2045 
2046 union cvmx_mio_rst_cfg {
2047 	uint64_t u64;
2048 	struct cvmx_mio_rst_cfg_s {
2049 		uint64_t reserved_3_63:61;
2050 		uint64_t cntl_clr_bist:1;
2051 		uint64_t warm_clr_bist:1;
2052 		uint64_t soft_clr_bist:1;
2053 	} s;
2054 	struct cvmx_mio_rst_cfg_cn61xx {
2055 		uint64_t bist_delay:58;
2056 		uint64_t reserved_3_5:3;
2057 		uint64_t cntl_clr_bist:1;
2058 		uint64_t warm_clr_bist:1;
2059 		uint64_t soft_clr_bist:1;
2060 	} cn61xx;
2061 	struct cvmx_mio_rst_cfg_cn61xx cn63xx;
2062 	struct cvmx_mio_rst_cfg_cn63xxp1 {
2063 		uint64_t bist_delay:58;
2064 		uint64_t reserved_2_5:4;
2065 		uint64_t warm_clr_bist:1;
2066 		uint64_t soft_clr_bist:1;
2067 	} cn63xxp1;
2068 	struct cvmx_mio_rst_cfg_cn61xx cn66xx;
2069 	struct cvmx_mio_rst_cfg_cn68xx {
2070 		uint64_t bist_delay:56;
2071 		uint64_t reserved_3_7:5;
2072 		uint64_t cntl_clr_bist:1;
2073 		uint64_t warm_clr_bist:1;
2074 		uint64_t soft_clr_bist:1;
2075 	} cn68xx;
2076 	struct cvmx_mio_rst_cfg_cn68xx cn68xxp1;
2077 };
2078 
2079 union cvmx_mio_rst_ckill {
2080 	uint64_t u64;
2081 	struct cvmx_mio_rst_ckill_s {
2082 		uint64_t reserved_47_63:17;
2083 		uint64_t timer:47;
2084 	} s;
2085 	struct cvmx_mio_rst_ckill_s cn61xx;
2086 	struct cvmx_mio_rst_ckill_s cn66xx;
2087 };
2088 
2089 union cvmx_mio_rst_cntlx {
2090 	uint64_t u64;
2091 	struct cvmx_mio_rst_cntlx_s {
2092 		uint64_t reserved_13_63:51;
2093 		uint64_t in_rev_ln:1;
2094 		uint64_t rev_lanes:1;
2095 		uint64_t gen1_only:1;
2096 		uint64_t prst_link:1;
2097 		uint64_t rst_done:1;
2098 		uint64_t rst_link:1;
2099 		uint64_t host_mode:1;
2100 		uint64_t prtmode:2;
2101 		uint64_t rst_drv:1;
2102 		uint64_t rst_rcv:1;
2103 		uint64_t rst_chip:1;
2104 		uint64_t rst_val:1;
2105 	} s;
2106 	struct cvmx_mio_rst_cntlx_s cn61xx;
2107 	struct cvmx_mio_rst_cntlx_cn66xx {
2108 		uint64_t reserved_10_63:54;
2109 		uint64_t prst_link:1;
2110 		uint64_t rst_done:1;
2111 		uint64_t rst_link:1;
2112 		uint64_t host_mode:1;
2113 		uint64_t prtmode:2;
2114 		uint64_t rst_drv:1;
2115 		uint64_t rst_rcv:1;
2116 		uint64_t rst_chip:1;
2117 		uint64_t rst_val:1;
2118 	} cn66xx;
2119 	struct cvmx_mio_rst_cntlx_cn66xx cn68xx;
2120 };
2121 
2122 union cvmx_mio_rst_ctlx {
2123 	uint64_t u64;
2124 	struct cvmx_mio_rst_ctlx_s {
2125 		uint64_t reserved_13_63:51;
2126 		uint64_t in_rev_ln:1;
2127 		uint64_t rev_lanes:1;
2128 		uint64_t gen1_only:1;
2129 		uint64_t prst_link:1;
2130 		uint64_t rst_done:1;
2131 		uint64_t rst_link:1;
2132 		uint64_t host_mode:1;
2133 		uint64_t prtmode:2;
2134 		uint64_t rst_drv:1;
2135 		uint64_t rst_rcv:1;
2136 		uint64_t rst_chip:1;
2137 		uint64_t rst_val:1;
2138 	} s;
2139 	struct cvmx_mio_rst_ctlx_s cn61xx;
2140 	struct cvmx_mio_rst_ctlx_cn63xx {
2141 		uint64_t reserved_10_63:54;
2142 		uint64_t prst_link:1;
2143 		uint64_t rst_done:1;
2144 		uint64_t rst_link:1;
2145 		uint64_t host_mode:1;
2146 		uint64_t prtmode:2;
2147 		uint64_t rst_drv:1;
2148 		uint64_t rst_rcv:1;
2149 		uint64_t rst_chip:1;
2150 		uint64_t rst_val:1;
2151 	} cn63xx;
2152 	struct cvmx_mio_rst_ctlx_cn63xxp1 {
2153 		uint64_t reserved_9_63:55;
2154 		uint64_t rst_done:1;
2155 		uint64_t rst_link:1;
2156 		uint64_t host_mode:1;
2157 		uint64_t prtmode:2;
2158 		uint64_t rst_drv:1;
2159 		uint64_t rst_rcv:1;
2160 		uint64_t rst_chip:1;
2161 		uint64_t rst_val:1;
2162 	} cn63xxp1;
2163 	struct cvmx_mio_rst_ctlx_cn63xx cn66xx;
2164 	struct cvmx_mio_rst_ctlx_cn63xx cn68xx;
2165 	struct cvmx_mio_rst_ctlx_cn63xx cn68xxp1;
2166 };
2167 
2168 union cvmx_mio_rst_delay {
2169 	uint64_t u64;
2170 	struct cvmx_mio_rst_delay_s {
2171 		uint64_t reserved_32_63:32;
2172 		uint64_t warm_rst_dly:16;
2173 		uint64_t soft_rst_dly:16;
2174 	} s;
2175 	struct cvmx_mio_rst_delay_s cn61xx;
2176 	struct cvmx_mio_rst_delay_s cn63xx;
2177 	struct cvmx_mio_rst_delay_s cn63xxp1;
2178 	struct cvmx_mio_rst_delay_s cn66xx;
2179 	struct cvmx_mio_rst_delay_s cn68xx;
2180 	struct cvmx_mio_rst_delay_s cn68xxp1;
2181 };
2182 
2183 union cvmx_mio_rst_int {
2184 	uint64_t u64;
2185 	struct cvmx_mio_rst_int_s {
2186 		uint64_t reserved_10_63:54;
2187 		uint64_t perst1:1;
2188 		uint64_t perst0:1;
2189 		uint64_t reserved_4_7:4;
2190 		uint64_t rst_link3:1;
2191 		uint64_t rst_link2:1;
2192 		uint64_t rst_link1:1;
2193 		uint64_t rst_link0:1;
2194 	} s;
2195 	struct cvmx_mio_rst_int_cn61xx {
2196 		uint64_t reserved_10_63:54;
2197 		uint64_t perst1:1;
2198 		uint64_t perst0:1;
2199 		uint64_t reserved_2_7:6;
2200 		uint64_t rst_link1:1;
2201 		uint64_t rst_link0:1;
2202 	} cn61xx;
2203 	struct cvmx_mio_rst_int_cn61xx cn63xx;
2204 	struct cvmx_mio_rst_int_cn61xx cn63xxp1;
2205 	struct cvmx_mio_rst_int_s cn66xx;
2206 	struct cvmx_mio_rst_int_cn61xx cn68xx;
2207 	struct cvmx_mio_rst_int_cn61xx cn68xxp1;
2208 };
2209 
2210 union cvmx_mio_rst_int_en {
2211 	uint64_t u64;
2212 	struct cvmx_mio_rst_int_en_s {
2213 		uint64_t reserved_10_63:54;
2214 		uint64_t perst1:1;
2215 		uint64_t perst0:1;
2216 		uint64_t reserved_4_7:4;
2217 		uint64_t rst_link3:1;
2218 		uint64_t rst_link2:1;
2219 		uint64_t rst_link1:1;
2220 		uint64_t rst_link0:1;
2221 	} s;
2222 	struct cvmx_mio_rst_int_en_cn61xx {
2223 		uint64_t reserved_10_63:54;
2224 		uint64_t perst1:1;
2225 		uint64_t perst0:1;
2226 		uint64_t reserved_2_7:6;
2227 		uint64_t rst_link1:1;
2228 		uint64_t rst_link0:1;
2229 	} cn61xx;
2230 	struct cvmx_mio_rst_int_en_cn61xx cn63xx;
2231 	struct cvmx_mio_rst_int_en_cn61xx cn63xxp1;
2232 	struct cvmx_mio_rst_int_en_s cn66xx;
2233 	struct cvmx_mio_rst_int_en_cn61xx cn68xx;
2234 	struct cvmx_mio_rst_int_en_cn61xx cn68xxp1;
2235 };
2236 
2237 union cvmx_mio_twsx_int {
2238 	uint64_t u64;
2239 	struct cvmx_mio_twsx_int_s {
2240 		uint64_t reserved_12_63:52;
2241 		uint64_t scl:1;
2242 		uint64_t sda:1;
2243 		uint64_t scl_ovr:1;
2244 		uint64_t sda_ovr:1;
2245 		uint64_t reserved_7_7:1;
2246 		uint64_t core_en:1;
2247 		uint64_t ts_en:1;
2248 		uint64_t st_en:1;
2249 		uint64_t reserved_3_3:1;
2250 		uint64_t core_int:1;
2251 		uint64_t ts_int:1;
2252 		uint64_t st_int:1;
2253 	} s;
2254 	struct cvmx_mio_twsx_int_s cn30xx;
2255 	struct cvmx_mio_twsx_int_s cn31xx;
2256 	struct cvmx_mio_twsx_int_s cn38xx;
2257 	struct cvmx_mio_twsx_int_cn38xxp2 {
2258 		uint64_t reserved_7_63:57;
2259 		uint64_t core_en:1;
2260 		uint64_t ts_en:1;
2261 		uint64_t st_en:1;
2262 		uint64_t reserved_3_3:1;
2263 		uint64_t core_int:1;
2264 		uint64_t ts_int:1;
2265 		uint64_t st_int:1;
2266 	} cn38xxp2;
2267 	struct cvmx_mio_twsx_int_s cn50xx;
2268 	struct cvmx_mio_twsx_int_s cn52xx;
2269 	struct cvmx_mio_twsx_int_s cn52xxp1;
2270 	struct cvmx_mio_twsx_int_s cn56xx;
2271 	struct cvmx_mio_twsx_int_s cn56xxp1;
2272 	struct cvmx_mio_twsx_int_s cn58xx;
2273 	struct cvmx_mio_twsx_int_s cn58xxp1;
2274 	struct cvmx_mio_twsx_int_s cn61xx;
2275 	struct cvmx_mio_twsx_int_s cn63xx;
2276 	struct cvmx_mio_twsx_int_s cn63xxp1;
2277 	struct cvmx_mio_twsx_int_s cn66xx;
2278 	struct cvmx_mio_twsx_int_s cn68xx;
2279 	struct cvmx_mio_twsx_int_s cn68xxp1;
2280 };
2281 
2282 union cvmx_mio_twsx_sw_twsi {
2283 	uint64_t u64;
2284 	struct cvmx_mio_twsx_sw_twsi_s {
2285 		uint64_t v:1;
2286 		uint64_t slonly:1;
2287 		uint64_t eia:1;
2288 		uint64_t op:4;
2289 		uint64_t r:1;
2290 		uint64_t sovr:1;
2291 		uint64_t size:3;
2292 		uint64_t scr:2;
2293 		uint64_t a:10;
2294 		uint64_t ia:5;
2295 		uint64_t eop_ia:3;
2296 		uint64_t d:32;
2297 	} s;
2298 	struct cvmx_mio_twsx_sw_twsi_s cn30xx;
2299 	struct cvmx_mio_twsx_sw_twsi_s cn31xx;
2300 	struct cvmx_mio_twsx_sw_twsi_s cn38xx;
2301 	struct cvmx_mio_twsx_sw_twsi_s cn38xxp2;
2302 	struct cvmx_mio_twsx_sw_twsi_s cn50xx;
2303 	struct cvmx_mio_twsx_sw_twsi_s cn52xx;
2304 	struct cvmx_mio_twsx_sw_twsi_s cn52xxp1;
2305 	struct cvmx_mio_twsx_sw_twsi_s cn56xx;
2306 	struct cvmx_mio_twsx_sw_twsi_s cn56xxp1;
2307 	struct cvmx_mio_twsx_sw_twsi_s cn58xx;
2308 	struct cvmx_mio_twsx_sw_twsi_s cn58xxp1;
2309 	struct cvmx_mio_twsx_sw_twsi_s cn61xx;
2310 	struct cvmx_mio_twsx_sw_twsi_s cn63xx;
2311 	struct cvmx_mio_twsx_sw_twsi_s cn63xxp1;
2312 	struct cvmx_mio_twsx_sw_twsi_s cn66xx;
2313 	struct cvmx_mio_twsx_sw_twsi_s cn68xx;
2314 	struct cvmx_mio_twsx_sw_twsi_s cn68xxp1;
2315 };
2316 
2317 union cvmx_mio_twsx_sw_twsi_ext {
2318 	uint64_t u64;
2319 	struct cvmx_mio_twsx_sw_twsi_ext_s {
2320 		uint64_t reserved_40_63:24;
2321 		uint64_t ia:8;
2322 		uint64_t d:32;
2323 	} s;
2324 	struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx;
2325 	struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx;
2326 	struct cvmx_mio_twsx_sw_twsi_ext_s cn38xx;
2327 	struct cvmx_mio_twsx_sw_twsi_ext_s cn38xxp2;
2328 	struct cvmx_mio_twsx_sw_twsi_ext_s cn50xx;
2329 	struct cvmx_mio_twsx_sw_twsi_ext_s cn52xx;
2330 	struct cvmx_mio_twsx_sw_twsi_ext_s cn52xxp1;
2331 	struct cvmx_mio_twsx_sw_twsi_ext_s cn56xx;
2332 	struct cvmx_mio_twsx_sw_twsi_ext_s cn56xxp1;
2333 	struct cvmx_mio_twsx_sw_twsi_ext_s cn58xx;
2334 	struct cvmx_mio_twsx_sw_twsi_ext_s cn58xxp1;
2335 	struct cvmx_mio_twsx_sw_twsi_ext_s cn61xx;
2336 	struct cvmx_mio_twsx_sw_twsi_ext_s cn63xx;
2337 	struct cvmx_mio_twsx_sw_twsi_ext_s cn63xxp1;
2338 	struct cvmx_mio_twsx_sw_twsi_ext_s cn66xx;
2339 	struct cvmx_mio_twsx_sw_twsi_ext_s cn68xx;
2340 	struct cvmx_mio_twsx_sw_twsi_ext_s cn68xxp1;
2341 };
2342 
2343 union cvmx_mio_twsx_twsi_sw {
2344 	uint64_t u64;
2345 	struct cvmx_mio_twsx_twsi_sw_s {
2346 		uint64_t v:2;
2347 		uint64_t reserved_32_61:30;
2348 		uint64_t d:32;
2349 	} s;
2350 	struct cvmx_mio_twsx_twsi_sw_s cn30xx;
2351 	struct cvmx_mio_twsx_twsi_sw_s cn31xx;
2352 	struct cvmx_mio_twsx_twsi_sw_s cn38xx;
2353 	struct cvmx_mio_twsx_twsi_sw_s cn38xxp2;
2354 	struct cvmx_mio_twsx_twsi_sw_s cn50xx;
2355 	struct cvmx_mio_twsx_twsi_sw_s cn52xx;
2356 	struct cvmx_mio_twsx_twsi_sw_s cn52xxp1;
2357 	struct cvmx_mio_twsx_twsi_sw_s cn56xx;
2358 	struct cvmx_mio_twsx_twsi_sw_s cn56xxp1;
2359 	struct cvmx_mio_twsx_twsi_sw_s cn58xx;
2360 	struct cvmx_mio_twsx_twsi_sw_s cn58xxp1;
2361 	struct cvmx_mio_twsx_twsi_sw_s cn61xx;
2362 	struct cvmx_mio_twsx_twsi_sw_s cn63xx;
2363 	struct cvmx_mio_twsx_twsi_sw_s cn63xxp1;
2364 	struct cvmx_mio_twsx_twsi_sw_s cn66xx;
2365 	struct cvmx_mio_twsx_twsi_sw_s cn68xx;
2366 	struct cvmx_mio_twsx_twsi_sw_s cn68xxp1;
2367 };
2368 
2369 union cvmx_mio_uartx_dlh {
2370 	uint64_t u64;
2371 	struct cvmx_mio_uartx_dlh_s {
2372 		uint64_t reserved_8_63:56;
2373 		uint64_t dlh:8;
2374 	} s;
2375 	struct cvmx_mio_uartx_dlh_s cn30xx;
2376 	struct cvmx_mio_uartx_dlh_s cn31xx;
2377 	struct cvmx_mio_uartx_dlh_s cn38xx;
2378 	struct cvmx_mio_uartx_dlh_s cn38xxp2;
2379 	struct cvmx_mio_uartx_dlh_s cn50xx;
2380 	struct cvmx_mio_uartx_dlh_s cn52xx;
2381 	struct cvmx_mio_uartx_dlh_s cn52xxp1;
2382 	struct cvmx_mio_uartx_dlh_s cn56xx;
2383 	struct cvmx_mio_uartx_dlh_s cn56xxp1;
2384 	struct cvmx_mio_uartx_dlh_s cn58xx;
2385 	struct cvmx_mio_uartx_dlh_s cn58xxp1;
2386 	struct cvmx_mio_uartx_dlh_s cn61xx;
2387 	struct cvmx_mio_uartx_dlh_s cn63xx;
2388 	struct cvmx_mio_uartx_dlh_s cn63xxp1;
2389 	struct cvmx_mio_uartx_dlh_s cn66xx;
2390 	struct cvmx_mio_uartx_dlh_s cn68xx;
2391 	struct cvmx_mio_uartx_dlh_s cn68xxp1;
2392 };
2393 
2394 union cvmx_mio_uartx_dll {
2395 	uint64_t u64;
2396 	struct cvmx_mio_uartx_dll_s {
2397 		uint64_t reserved_8_63:56;
2398 		uint64_t dll:8;
2399 	} s;
2400 	struct cvmx_mio_uartx_dll_s cn30xx;
2401 	struct cvmx_mio_uartx_dll_s cn31xx;
2402 	struct cvmx_mio_uartx_dll_s cn38xx;
2403 	struct cvmx_mio_uartx_dll_s cn38xxp2;
2404 	struct cvmx_mio_uartx_dll_s cn50xx;
2405 	struct cvmx_mio_uartx_dll_s cn52xx;
2406 	struct cvmx_mio_uartx_dll_s cn52xxp1;
2407 	struct cvmx_mio_uartx_dll_s cn56xx;
2408 	struct cvmx_mio_uartx_dll_s cn56xxp1;
2409 	struct cvmx_mio_uartx_dll_s cn58xx;
2410 	struct cvmx_mio_uartx_dll_s cn58xxp1;
2411 	struct cvmx_mio_uartx_dll_s cn61xx;
2412 	struct cvmx_mio_uartx_dll_s cn63xx;
2413 	struct cvmx_mio_uartx_dll_s cn63xxp1;
2414 	struct cvmx_mio_uartx_dll_s cn66xx;
2415 	struct cvmx_mio_uartx_dll_s cn68xx;
2416 	struct cvmx_mio_uartx_dll_s cn68xxp1;
2417 };
2418 
2419 union cvmx_mio_uartx_far {
2420 	uint64_t u64;
2421 	struct cvmx_mio_uartx_far_s {
2422 		uint64_t reserved_1_63:63;
2423 		uint64_t far:1;
2424 	} s;
2425 	struct cvmx_mio_uartx_far_s cn30xx;
2426 	struct cvmx_mio_uartx_far_s cn31xx;
2427 	struct cvmx_mio_uartx_far_s cn38xx;
2428 	struct cvmx_mio_uartx_far_s cn38xxp2;
2429 	struct cvmx_mio_uartx_far_s cn50xx;
2430 	struct cvmx_mio_uartx_far_s cn52xx;
2431 	struct cvmx_mio_uartx_far_s cn52xxp1;
2432 	struct cvmx_mio_uartx_far_s cn56xx;
2433 	struct cvmx_mio_uartx_far_s cn56xxp1;
2434 	struct cvmx_mio_uartx_far_s cn58xx;
2435 	struct cvmx_mio_uartx_far_s cn58xxp1;
2436 	struct cvmx_mio_uartx_far_s cn61xx;
2437 	struct cvmx_mio_uartx_far_s cn63xx;
2438 	struct cvmx_mio_uartx_far_s cn63xxp1;
2439 	struct cvmx_mio_uartx_far_s cn66xx;
2440 	struct cvmx_mio_uartx_far_s cn68xx;
2441 	struct cvmx_mio_uartx_far_s cn68xxp1;
2442 };
2443 
2444 union cvmx_mio_uartx_fcr {
2445 	uint64_t u64;
2446 	struct cvmx_mio_uartx_fcr_s {
2447 		uint64_t reserved_8_63:56;
2448 		uint64_t rxtrig:2;
2449 		uint64_t txtrig:2;
2450 		uint64_t reserved_3_3:1;
2451 		uint64_t txfr:1;
2452 		uint64_t rxfr:1;
2453 		uint64_t en:1;
2454 	} s;
2455 	struct cvmx_mio_uartx_fcr_s cn30xx;
2456 	struct cvmx_mio_uartx_fcr_s cn31xx;
2457 	struct cvmx_mio_uartx_fcr_s cn38xx;
2458 	struct cvmx_mio_uartx_fcr_s cn38xxp2;
2459 	struct cvmx_mio_uartx_fcr_s cn50xx;
2460 	struct cvmx_mio_uartx_fcr_s cn52xx;
2461 	struct cvmx_mio_uartx_fcr_s cn52xxp1;
2462 	struct cvmx_mio_uartx_fcr_s cn56xx;
2463 	struct cvmx_mio_uartx_fcr_s cn56xxp1;
2464 	struct cvmx_mio_uartx_fcr_s cn58xx;
2465 	struct cvmx_mio_uartx_fcr_s cn58xxp1;
2466 	struct cvmx_mio_uartx_fcr_s cn61xx;
2467 	struct cvmx_mio_uartx_fcr_s cn63xx;
2468 	struct cvmx_mio_uartx_fcr_s cn63xxp1;
2469 	struct cvmx_mio_uartx_fcr_s cn66xx;
2470 	struct cvmx_mio_uartx_fcr_s cn68xx;
2471 	struct cvmx_mio_uartx_fcr_s cn68xxp1;
2472 };
2473 
2474 union cvmx_mio_uartx_htx {
2475 	uint64_t u64;
2476 	struct cvmx_mio_uartx_htx_s {
2477 		uint64_t reserved_1_63:63;
2478 		uint64_t htx:1;
2479 	} s;
2480 	struct cvmx_mio_uartx_htx_s cn30xx;
2481 	struct cvmx_mio_uartx_htx_s cn31xx;
2482 	struct cvmx_mio_uartx_htx_s cn38xx;
2483 	struct cvmx_mio_uartx_htx_s cn38xxp2;
2484 	struct cvmx_mio_uartx_htx_s cn50xx;
2485 	struct cvmx_mio_uartx_htx_s cn52xx;
2486 	struct cvmx_mio_uartx_htx_s cn52xxp1;
2487 	struct cvmx_mio_uartx_htx_s cn56xx;
2488 	struct cvmx_mio_uartx_htx_s cn56xxp1;
2489 	struct cvmx_mio_uartx_htx_s cn58xx;
2490 	struct cvmx_mio_uartx_htx_s cn58xxp1;
2491 	struct cvmx_mio_uartx_htx_s cn61xx;
2492 	struct cvmx_mio_uartx_htx_s cn63xx;
2493 	struct cvmx_mio_uartx_htx_s cn63xxp1;
2494 	struct cvmx_mio_uartx_htx_s cn66xx;
2495 	struct cvmx_mio_uartx_htx_s cn68xx;
2496 	struct cvmx_mio_uartx_htx_s cn68xxp1;
2497 };
2498 
2499 union cvmx_mio_uartx_ier {
2500 	uint64_t u64;
2501 	struct cvmx_mio_uartx_ier_s {
2502 		uint64_t reserved_8_63:56;
2503 		uint64_t ptime:1;
2504 		uint64_t reserved_4_6:3;
2505 		uint64_t edssi:1;
2506 		uint64_t elsi:1;
2507 		uint64_t etbei:1;
2508 		uint64_t erbfi:1;
2509 	} s;
2510 	struct cvmx_mio_uartx_ier_s cn30xx;
2511 	struct cvmx_mio_uartx_ier_s cn31xx;
2512 	struct cvmx_mio_uartx_ier_s cn38xx;
2513 	struct cvmx_mio_uartx_ier_s cn38xxp2;
2514 	struct cvmx_mio_uartx_ier_s cn50xx;
2515 	struct cvmx_mio_uartx_ier_s cn52xx;
2516 	struct cvmx_mio_uartx_ier_s cn52xxp1;
2517 	struct cvmx_mio_uartx_ier_s cn56xx;
2518 	struct cvmx_mio_uartx_ier_s cn56xxp1;
2519 	struct cvmx_mio_uartx_ier_s cn58xx;
2520 	struct cvmx_mio_uartx_ier_s cn58xxp1;
2521 	struct cvmx_mio_uartx_ier_s cn61xx;
2522 	struct cvmx_mio_uartx_ier_s cn63xx;
2523 	struct cvmx_mio_uartx_ier_s cn63xxp1;
2524 	struct cvmx_mio_uartx_ier_s cn66xx;
2525 	struct cvmx_mio_uartx_ier_s cn68xx;
2526 	struct cvmx_mio_uartx_ier_s cn68xxp1;
2527 };
2528 
2529 union cvmx_mio_uartx_iir {
2530 	uint64_t u64;
2531 	struct cvmx_mio_uartx_iir_s {
2532 		uint64_t reserved_8_63:56;
2533 		uint64_t fen:2;
2534 		uint64_t reserved_4_5:2;
2535 		uint64_t iid:4;
2536 	} s;
2537 	struct cvmx_mio_uartx_iir_s cn30xx;
2538 	struct cvmx_mio_uartx_iir_s cn31xx;
2539 	struct cvmx_mio_uartx_iir_s cn38xx;
2540 	struct cvmx_mio_uartx_iir_s cn38xxp2;
2541 	struct cvmx_mio_uartx_iir_s cn50xx;
2542 	struct cvmx_mio_uartx_iir_s cn52xx;
2543 	struct cvmx_mio_uartx_iir_s cn52xxp1;
2544 	struct cvmx_mio_uartx_iir_s cn56xx;
2545 	struct cvmx_mio_uartx_iir_s cn56xxp1;
2546 	struct cvmx_mio_uartx_iir_s cn58xx;
2547 	struct cvmx_mio_uartx_iir_s cn58xxp1;
2548 	struct cvmx_mio_uartx_iir_s cn61xx;
2549 	struct cvmx_mio_uartx_iir_s cn63xx;
2550 	struct cvmx_mio_uartx_iir_s cn63xxp1;
2551 	struct cvmx_mio_uartx_iir_s cn66xx;
2552 	struct cvmx_mio_uartx_iir_s cn68xx;
2553 	struct cvmx_mio_uartx_iir_s cn68xxp1;
2554 };
2555 
2556 union cvmx_mio_uartx_lcr {
2557 	uint64_t u64;
2558 	struct cvmx_mio_uartx_lcr_s {
2559 		uint64_t reserved_8_63:56;
2560 		uint64_t dlab:1;
2561 		uint64_t brk:1;
2562 		uint64_t reserved_5_5:1;
2563 		uint64_t eps:1;
2564 		uint64_t pen:1;
2565 		uint64_t stop:1;
2566 		uint64_t cls:2;
2567 	} s;
2568 	struct cvmx_mio_uartx_lcr_s cn30xx;
2569 	struct cvmx_mio_uartx_lcr_s cn31xx;
2570 	struct cvmx_mio_uartx_lcr_s cn38xx;
2571 	struct cvmx_mio_uartx_lcr_s cn38xxp2;
2572 	struct cvmx_mio_uartx_lcr_s cn50xx;
2573 	struct cvmx_mio_uartx_lcr_s cn52xx;
2574 	struct cvmx_mio_uartx_lcr_s cn52xxp1;
2575 	struct cvmx_mio_uartx_lcr_s cn56xx;
2576 	struct cvmx_mio_uartx_lcr_s cn56xxp1;
2577 	struct cvmx_mio_uartx_lcr_s cn58xx;
2578 	struct cvmx_mio_uartx_lcr_s cn58xxp1;
2579 	struct cvmx_mio_uartx_lcr_s cn61xx;
2580 	struct cvmx_mio_uartx_lcr_s cn63xx;
2581 	struct cvmx_mio_uartx_lcr_s cn63xxp1;
2582 	struct cvmx_mio_uartx_lcr_s cn66xx;
2583 	struct cvmx_mio_uartx_lcr_s cn68xx;
2584 	struct cvmx_mio_uartx_lcr_s cn68xxp1;
2585 };
2586 
2587 union cvmx_mio_uartx_lsr {
2588 	uint64_t u64;
2589 	struct cvmx_mio_uartx_lsr_s {
2590 		uint64_t reserved_8_63:56;
2591 		uint64_t ferr:1;
2592 		uint64_t temt:1;
2593 		uint64_t thre:1;
2594 		uint64_t bi:1;
2595 		uint64_t fe:1;
2596 		uint64_t pe:1;
2597 		uint64_t oe:1;
2598 		uint64_t dr:1;
2599 	} s;
2600 	struct cvmx_mio_uartx_lsr_s cn30xx;
2601 	struct cvmx_mio_uartx_lsr_s cn31xx;
2602 	struct cvmx_mio_uartx_lsr_s cn38xx;
2603 	struct cvmx_mio_uartx_lsr_s cn38xxp2;
2604 	struct cvmx_mio_uartx_lsr_s cn50xx;
2605 	struct cvmx_mio_uartx_lsr_s cn52xx;
2606 	struct cvmx_mio_uartx_lsr_s cn52xxp1;
2607 	struct cvmx_mio_uartx_lsr_s cn56xx;
2608 	struct cvmx_mio_uartx_lsr_s cn56xxp1;
2609 	struct cvmx_mio_uartx_lsr_s cn58xx;
2610 	struct cvmx_mio_uartx_lsr_s cn58xxp1;
2611 	struct cvmx_mio_uartx_lsr_s cn61xx;
2612 	struct cvmx_mio_uartx_lsr_s cn63xx;
2613 	struct cvmx_mio_uartx_lsr_s cn63xxp1;
2614 	struct cvmx_mio_uartx_lsr_s cn66xx;
2615 	struct cvmx_mio_uartx_lsr_s cn68xx;
2616 	struct cvmx_mio_uartx_lsr_s cn68xxp1;
2617 };
2618 
2619 union cvmx_mio_uartx_mcr {
2620 	uint64_t u64;
2621 	struct cvmx_mio_uartx_mcr_s {
2622 		uint64_t reserved_6_63:58;
2623 		uint64_t afce:1;
2624 		uint64_t loop:1;
2625 		uint64_t out2:1;
2626 		uint64_t out1:1;
2627 		uint64_t rts:1;
2628 		uint64_t dtr:1;
2629 	} s;
2630 	struct cvmx_mio_uartx_mcr_s cn30xx;
2631 	struct cvmx_mio_uartx_mcr_s cn31xx;
2632 	struct cvmx_mio_uartx_mcr_s cn38xx;
2633 	struct cvmx_mio_uartx_mcr_s cn38xxp2;
2634 	struct cvmx_mio_uartx_mcr_s cn50xx;
2635 	struct cvmx_mio_uartx_mcr_s cn52xx;
2636 	struct cvmx_mio_uartx_mcr_s cn52xxp1;
2637 	struct cvmx_mio_uartx_mcr_s cn56xx;
2638 	struct cvmx_mio_uartx_mcr_s cn56xxp1;
2639 	struct cvmx_mio_uartx_mcr_s cn58xx;
2640 	struct cvmx_mio_uartx_mcr_s cn58xxp1;
2641 	struct cvmx_mio_uartx_mcr_s cn61xx;
2642 	struct cvmx_mio_uartx_mcr_s cn63xx;
2643 	struct cvmx_mio_uartx_mcr_s cn63xxp1;
2644 	struct cvmx_mio_uartx_mcr_s cn66xx;
2645 	struct cvmx_mio_uartx_mcr_s cn68xx;
2646 	struct cvmx_mio_uartx_mcr_s cn68xxp1;
2647 };
2648 
2649 union cvmx_mio_uartx_msr {
2650 	uint64_t u64;
2651 	struct cvmx_mio_uartx_msr_s {
2652 		uint64_t reserved_8_63:56;
2653 		uint64_t dcd:1;
2654 		uint64_t ri:1;
2655 		uint64_t dsr:1;
2656 		uint64_t cts:1;
2657 		uint64_t ddcd:1;
2658 		uint64_t teri:1;
2659 		uint64_t ddsr:1;
2660 		uint64_t dcts:1;
2661 	} s;
2662 	struct cvmx_mio_uartx_msr_s cn30xx;
2663 	struct cvmx_mio_uartx_msr_s cn31xx;
2664 	struct cvmx_mio_uartx_msr_s cn38xx;
2665 	struct cvmx_mio_uartx_msr_s cn38xxp2;
2666 	struct cvmx_mio_uartx_msr_s cn50xx;
2667 	struct cvmx_mio_uartx_msr_s cn52xx;
2668 	struct cvmx_mio_uartx_msr_s cn52xxp1;
2669 	struct cvmx_mio_uartx_msr_s cn56xx;
2670 	struct cvmx_mio_uartx_msr_s cn56xxp1;
2671 	struct cvmx_mio_uartx_msr_s cn58xx;
2672 	struct cvmx_mio_uartx_msr_s cn58xxp1;
2673 	struct cvmx_mio_uartx_msr_s cn61xx;
2674 	struct cvmx_mio_uartx_msr_s cn63xx;
2675 	struct cvmx_mio_uartx_msr_s cn63xxp1;
2676 	struct cvmx_mio_uartx_msr_s cn66xx;
2677 	struct cvmx_mio_uartx_msr_s cn68xx;
2678 	struct cvmx_mio_uartx_msr_s cn68xxp1;
2679 };
2680 
2681 union cvmx_mio_uartx_rbr {
2682 	uint64_t u64;
2683 	struct cvmx_mio_uartx_rbr_s {
2684 		uint64_t reserved_8_63:56;
2685 		uint64_t rbr:8;
2686 	} s;
2687 	struct cvmx_mio_uartx_rbr_s cn30xx;
2688 	struct cvmx_mio_uartx_rbr_s cn31xx;
2689 	struct cvmx_mio_uartx_rbr_s cn38xx;
2690 	struct cvmx_mio_uartx_rbr_s cn38xxp2;
2691 	struct cvmx_mio_uartx_rbr_s cn50xx;
2692 	struct cvmx_mio_uartx_rbr_s cn52xx;
2693 	struct cvmx_mio_uartx_rbr_s cn52xxp1;
2694 	struct cvmx_mio_uartx_rbr_s cn56xx;
2695 	struct cvmx_mio_uartx_rbr_s cn56xxp1;
2696 	struct cvmx_mio_uartx_rbr_s cn58xx;
2697 	struct cvmx_mio_uartx_rbr_s cn58xxp1;
2698 	struct cvmx_mio_uartx_rbr_s cn61xx;
2699 	struct cvmx_mio_uartx_rbr_s cn63xx;
2700 	struct cvmx_mio_uartx_rbr_s cn63xxp1;
2701 	struct cvmx_mio_uartx_rbr_s cn66xx;
2702 	struct cvmx_mio_uartx_rbr_s cn68xx;
2703 	struct cvmx_mio_uartx_rbr_s cn68xxp1;
2704 };
2705 
2706 union cvmx_mio_uartx_rfl {
2707 	uint64_t u64;
2708 	struct cvmx_mio_uartx_rfl_s {
2709 		uint64_t reserved_7_63:57;
2710 		uint64_t rfl:7;
2711 	} s;
2712 	struct cvmx_mio_uartx_rfl_s cn30xx;
2713 	struct cvmx_mio_uartx_rfl_s cn31xx;
2714 	struct cvmx_mio_uartx_rfl_s cn38xx;
2715 	struct cvmx_mio_uartx_rfl_s cn38xxp2;
2716 	struct cvmx_mio_uartx_rfl_s cn50xx;
2717 	struct cvmx_mio_uartx_rfl_s cn52xx;
2718 	struct cvmx_mio_uartx_rfl_s cn52xxp1;
2719 	struct cvmx_mio_uartx_rfl_s cn56xx;
2720 	struct cvmx_mio_uartx_rfl_s cn56xxp1;
2721 	struct cvmx_mio_uartx_rfl_s cn58xx;
2722 	struct cvmx_mio_uartx_rfl_s cn58xxp1;
2723 	struct cvmx_mio_uartx_rfl_s cn61xx;
2724 	struct cvmx_mio_uartx_rfl_s cn63xx;
2725 	struct cvmx_mio_uartx_rfl_s cn63xxp1;
2726 	struct cvmx_mio_uartx_rfl_s cn66xx;
2727 	struct cvmx_mio_uartx_rfl_s cn68xx;
2728 	struct cvmx_mio_uartx_rfl_s cn68xxp1;
2729 };
2730 
2731 union cvmx_mio_uartx_rfw {
2732 	uint64_t u64;
2733 	struct cvmx_mio_uartx_rfw_s {
2734 		uint64_t reserved_10_63:54;
2735 		uint64_t rffe:1;
2736 		uint64_t rfpe:1;
2737 		uint64_t rfwd:8;
2738 	} s;
2739 	struct cvmx_mio_uartx_rfw_s cn30xx;
2740 	struct cvmx_mio_uartx_rfw_s cn31xx;
2741 	struct cvmx_mio_uartx_rfw_s cn38xx;
2742 	struct cvmx_mio_uartx_rfw_s cn38xxp2;
2743 	struct cvmx_mio_uartx_rfw_s cn50xx;
2744 	struct cvmx_mio_uartx_rfw_s cn52xx;
2745 	struct cvmx_mio_uartx_rfw_s cn52xxp1;
2746 	struct cvmx_mio_uartx_rfw_s cn56xx;
2747 	struct cvmx_mio_uartx_rfw_s cn56xxp1;
2748 	struct cvmx_mio_uartx_rfw_s cn58xx;
2749 	struct cvmx_mio_uartx_rfw_s cn58xxp1;
2750 	struct cvmx_mio_uartx_rfw_s cn61xx;
2751 	struct cvmx_mio_uartx_rfw_s cn63xx;
2752 	struct cvmx_mio_uartx_rfw_s cn63xxp1;
2753 	struct cvmx_mio_uartx_rfw_s cn66xx;
2754 	struct cvmx_mio_uartx_rfw_s cn68xx;
2755 	struct cvmx_mio_uartx_rfw_s cn68xxp1;
2756 };
2757 
2758 union cvmx_mio_uartx_sbcr {
2759 	uint64_t u64;
2760 	struct cvmx_mio_uartx_sbcr_s {
2761 		uint64_t reserved_1_63:63;
2762 		uint64_t sbcr:1;
2763 	} s;
2764 	struct cvmx_mio_uartx_sbcr_s cn30xx;
2765 	struct cvmx_mio_uartx_sbcr_s cn31xx;
2766 	struct cvmx_mio_uartx_sbcr_s cn38xx;
2767 	struct cvmx_mio_uartx_sbcr_s cn38xxp2;
2768 	struct cvmx_mio_uartx_sbcr_s cn50xx;
2769 	struct cvmx_mio_uartx_sbcr_s cn52xx;
2770 	struct cvmx_mio_uartx_sbcr_s cn52xxp1;
2771 	struct cvmx_mio_uartx_sbcr_s cn56xx;
2772 	struct cvmx_mio_uartx_sbcr_s cn56xxp1;
2773 	struct cvmx_mio_uartx_sbcr_s cn58xx;
2774 	struct cvmx_mio_uartx_sbcr_s cn58xxp1;
2775 	struct cvmx_mio_uartx_sbcr_s cn61xx;
2776 	struct cvmx_mio_uartx_sbcr_s cn63xx;
2777 	struct cvmx_mio_uartx_sbcr_s cn63xxp1;
2778 	struct cvmx_mio_uartx_sbcr_s cn66xx;
2779 	struct cvmx_mio_uartx_sbcr_s cn68xx;
2780 	struct cvmx_mio_uartx_sbcr_s cn68xxp1;
2781 };
2782 
2783 union cvmx_mio_uartx_scr {
2784 	uint64_t u64;
2785 	struct cvmx_mio_uartx_scr_s {
2786 		uint64_t reserved_8_63:56;
2787 		uint64_t scr:8;
2788 	} s;
2789 	struct cvmx_mio_uartx_scr_s cn30xx;
2790 	struct cvmx_mio_uartx_scr_s cn31xx;
2791 	struct cvmx_mio_uartx_scr_s cn38xx;
2792 	struct cvmx_mio_uartx_scr_s cn38xxp2;
2793 	struct cvmx_mio_uartx_scr_s cn50xx;
2794 	struct cvmx_mio_uartx_scr_s cn52xx;
2795 	struct cvmx_mio_uartx_scr_s cn52xxp1;
2796 	struct cvmx_mio_uartx_scr_s cn56xx;
2797 	struct cvmx_mio_uartx_scr_s cn56xxp1;
2798 	struct cvmx_mio_uartx_scr_s cn58xx;
2799 	struct cvmx_mio_uartx_scr_s cn58xxp1;
2800 	struct cvmx_mio_uartx_scr_s cn61xx;
2801 	struct cvmx_mio_uartx_scr_s cn63xx;
2802 	struct cvmx_mio_uartx_scr_s cn63xxp1;
2803 	struct cvmx_mio_uartx_scr_s cn66xx;
2804 	struct cvmx_mio_uartx_scr_s cn68xx;
2805 	struct cvmx_mio_uartx_scr_s cn68xxp1;
2806 };
2807 
2808 union cvmx_mio_uartx_sfe {
2809 	uint64_t u64;
2810 	struct cvmx_mio_uartx_sfe_s {
2811 		uint64_t reserved_1_63:63;
2812 		uint64_t sfe:1;
2813 	} s;
2814 	struct cvmx_mio_uartx_sfe_s cn30xx;
2815 	struct cvmx_mio_uartx_sfe_s cn31xx;
2816 	struct cvmx_mio_uartx_sfe_s cn38xx;
2817 	struct cvmx_mio_uartx_sfe_s cn38xxp2;
2818 	struct cvmx_mio_uartx_sfe_s cn50xx;
2819 	struct cvmx_mio_uartx_sfe_s cn52xx;
2820 	struct cvmx_mio_uartx_sfe_s cn52xxp1;
2821 	struct cvmx_mio_uartx_sfe_s cn56xx;
2822 	struct cvmx_mio_uartx_sfe_s cn56xxp1;
2823 	struct cvmx_mio_uartx_sfe_s cn58xx;
2824 	struct cvmx_mio_uartx_sfe_s cn58xxp1;
2825 	struct cvmx_mio_uartx_sfe_s cn61xx;
2826 	struct cvmx_mio_uartx_sfe_s cn63xx;
2827 	struct cvmx_mio_uartx_sfe_s cn63xxp1;
2828 	struct cvmx_mio_uartx_sfe_s cn66xx;
2829 	struct cvmx_mio_uartx_sfe_s cn68xx;
2830 	struct cvmx_mio_uartx_sfe_s cn68xxp1;
2831 };
2832 
2833 union cvmx_mio_uartx_srr {
2834 	uint64_t u64;
2835 	struct cvmx_mio_uartx_srr_s {
2836 		uint64_t reserved_3_63:61;
2837 		uint64_t stfr:1;
2838 		uint64_t srfr:1;
2839 		uint64_t usr:1;
2840 	} s;
2841 	struct cvmx_mio_uartx_srr_s cn30xx;
2842 	struct cvmx_mio_uartx_srr_s cn31xx;
2843 	struct cvmx_mio_uartx_srr_s cn38xx;
2844 	struct cvmx_mio_uartx_srr_s cn38xxp2;
2845 	struct cvmx_mio_uartx_srr_s cn50xx;
2846 	struct cvmx_mio_uartx_srr_s cn52xx;
2847 	struct cvmx_mio_uartx_srr_s cn52xxp1;
2848 	struct cvmx_mio_uartx_srr_s cn56xx;
2849 	struct cvmx_mio_uartx_srr_s cn56xxp1;
2850 	struct cvmx_mio_uartx_srr_s cn58xx;
2851 	struct cvmx_mio_uartx_srr_s cn58xxp1;
2852 	struct cvmx_mio_uartx_srr_s cn61xx;
2853 	struct cvmx_mio_uartx_srr_s cn63xx;
2854 	struct cvmx_mio_uartx_srr_s cn63xxp1;
2855 	struct cvmx_mio_uartx_srr_s cn66xx;
2856 	struct cvmx_mio_uartx_srr_s cn68xx;
2857 	struct cvmx_mio_uartx_srr_s cn68xxp1;
2858 };
2859 
2860 union cvmx_mio_uartx_srt {
2861 	uint64_t u64;
2862 	struct cvmx_mio_uartx_srt_s {
2863 		uint64_t reserved_2_63:62;
2864 		uint64_t srt:2;
2865 	} s;
2866 	struct cvmx_mio_uartx_srt_s cn30xx;
2867 	struct cvmx_mio_uartx_srt_s cn31xx;
2868 	struct cvmx_mio_uartx_srt_s cn38xx;
2869 	struct cvmx_mio_uartx_srt_s cn38xxp2;
2870 	struct cvmx_mio_uartx_srt_s cn50xx;
2871 	struct cvmx_mio_uartx_srt_s cn52xx;
2872 	struct cvmx_mio_uartx_srt_s cn52xxp1;
2873 	struct cvmx_mio_uartx_srt_s cn56xx;
2874 	struct cvmx_mio_uartx_srt_s cn56xxp1;
2875 	struct cvmx_mio_uartx_srt_s cn58xx;
2876 	struct cvmx_mio_uartx_srt_s cn58xxp1;
2877 	struct cvmx_mio_uartx_srt_s cn61xx;
2878 	struct cvmx_mio_uartx_srt_s cn63xx;
2879 	struct cvmx_mio_uartx_srt_s cn63xxp1;
2880 	struct cvmx_mio_uartx_srt_s cn66xx;
2881 	struct cvmx_mio_uartx_srt_s cn68xx;
2882 	struct cvmx_mio_uartx_srt_s cn68xxp1;
2883 };
2884 
2885 union cvmx_mio_uartx_srts {
2886 	uint64_t u64;
2887 	struct cvmx_mio_uartx_srts_s {
2888 		uint64_t reserved_1_63:63;
2889 		uint64_t srts:1;
2890 	} s;
2891 	struct cvmx_mio_uartx_srts_s cn30xx;
2892 	struct cvmx_mio_uartx_srts_s cn31xx;
2893 	struct cvmx_mio_uartx_srts_s cn38xx;
2894 	struct cvmx_mio_uartx_srts_s cn38xxp2;
2895 	struct cvmx_mio_uartx_srts_s cn50xx;
2896 	struct cvmx_mio_uartx_srts_s cn52xx;
2897 	struct cvmx_mio_uartx_srts_s cn52xxp1;
2898 	struct cvmx_mio_uartx_srts_s cn56xx;
2899 	struct cvmx_mio_uartx_srts_s cn56xxp1;
2900 	struct cvmx_mio_uartx_srts_s cn58xx;
2901 	struct cvmx_mio_uartx_srts_s cn58xxp1;
2902 	struct cvmx_mio_uartx_srts_s cn61xx;
2903 	struct cvmx_mio_uartx_srts_s cn63xx;
2904 	struct cvmx_mio_uartx_srts_s cn63xxp1;
2905 	struct cvmx_mio_uartx_srts_s cn66xx;
2906 	struct cvmx_mio_uartx_srts_s cn68xx;
2907 	struct cvmx_mio_uartx_srts_s cn68xxp1;
2908 };
2909 
2910 union cvmx_mio_uartx_stt {
2911 	uint64_t u64;
2912 	struct cvmx_mio_uartx_stt_s {
2913 		uint64_t reserved_2_63:62;
2914 		uint64_t stt:2;
2915 	} s;
2916 	struct cvmx_mio_uartx_stt_s cn30xx;
2917 	struct cvmx_mio_uartx_stt_s cn31xx;
2918 	struct cvmx_mio_uartx_stt_s cn38xx;
2919 	struct cvmx_mio_uartx_stt_s cn38xxp2;
2920 	struct cvmx_mio_uartx_stt_s cn50xx;
2921 	struct cvmx_mio_uartx_stt_s cn52xx;
2922 	struct cvmx_mio_uartx_stt_s cn52xxp1;
2923 	struct cvmx_mio_uartx_stt_s cn56xx;
2924 	struct cvmx_mio_uartx_stt_s cn56xxp1;
2925 	struct cvmx_mio_uartx_stt_s cn58xx;
2926 	struct cvmx_mio_uartx_stt_s cn58xxp1;
2927 	struct cvmx_mio_uartx_stt_s cn61xx;
2928 	struct cvmx_mio_uartx_stt_s cn63xx;
2929 	struct cvmx_mio_uartx_stt_s cn63xxp1;
2930 	struct cvmx_mio_uartx_stt_s cn66xx;
2931 	struct cvmx_mio_uartx_stt_s cn68xx;
2932 	struct cvmx_mio_uartx_stt_s cn68xxp1;
2933 };
2934 
2935 union cvmx_mio_uartx_tfl {
2936 	uint64_t u64;
2937 	struct cvmx_mio_uartx_tfl_s {
2938 		uint64_t reserved_7_63:57;
2939 		uint64_t tfl:7;
2940 	} s;
2941 	struct cvmx_mio_uartx_tfl_s cn30xx;
2942 	struct cvmx_mio_uartx_tfl_s cn31xx;
2943 	struct cvmx_mio_uartx_tfl_s cn38xx;
2944 	struct cvmx_mio_uartx_tfl_s cn38xxp2;
2945 	struct cvmx_mio_uartx_tfl_s cn50xx;
2946 	struct cvmx_mio_uartx_tfl_s cn52xx;
2947 	struct cvmx_mio_uartx_tfl_s cn52xxp1;
2948 	struct cvmx_mio_uartx_tfl_s cn56xx;
2949 	struct cvmx_mio_uartx_tfl_s cn56xxp1;
2950 	struct cvmx_mio_uartx_tfl_s cn58xx;
2951 	struct cvmx_mio_uartx_tfl_s cn58xxp1;
2952 	struct cvmx_mio_uartx_tfl_s cn61xx;
2953 	struct cvmx_mio_uartx_tfl_s cn63xx;
2954 	struct cvmx_mio_uartx_tfl_s cn63xxp1;
2955 	struct cvmx_mio_uartx_tfl_s cn66xx;
2956 	struct cvmx_mio_uartx_tfl_s cn68xx;
2957 	struct cvmx_mio_uartx_tfl_s cn68xxp1;
2958 };
2959 
2960 union cvmx_mio_uartx_tfr {
2961 	uint64_t u64;
2962 	struct cvmx_mio_uartx_tfr_s {
2963 		uint64_t reserved_8_63:56;
2964 		uint64_t tfr:8;
2965 	} s;
2966 	struct cvmx_mio_uartx_tfr_s cn30xx;
2967 	struct cvmx_mio_uartx_tfr_s cn31xx;
2968 	struct cvmx_mio_uartx_tfr_s cn38xx;
2969 	struct cvmx_mio_uartx_tfr_s cn38xxp2;
2970 	struct cvmx_mio_uartx_tfr_s cn50xx;
2971 	struct cvmx_mio_uartx_tfr_s cn52xx;
2972 	struct cvmx_mio_uartx_tfr_s cn52xxp1;
2973 	struct cvmx_mio_uartx_tfr_s cn56xx;
2974 	struct cvmx_mio_uartx_tfr_s cn56xxp1;
2975 	struct cvmx_mio_uartx_tfr_s cn58xx;
2976 	struct cvmx_mio_uartx_tfr_s cn58xxp1;
2977 	struct cvmx_mio_uartx_tfr_s cn61xx;
2978 	struct cvmx_mio_uartx_tfr_s cn63xx;
2979 	struct cvmx_mio_uartx_tfr_s cn63xxp1;
2980 	struct cvmx_mio_uartx_tfr_s cn66xx;
2981 	struct cvmx_mio_uartx_tfr_s cn68xx;
2982 	struct cvmx_mio_uartx_tfr_s cn68xxp1;
2983 };
2984 
2985 union cvmx_mio_uartx_thr {
2986 	uint64_t u64;
2987 	struct cvmx_mio_uartx_thr_s {
2988 		uint64_t reserved_8_63:56;
2989 		uint64_t thr:8;
2990 	} s;
2991 	struct cvmx_mio_uartx_thr_s cn30xx;
2992 	struct cvmx_mio_uartx_thr_s cn31xx;
2993 	struct cvmx_mio_uartx_thr_s cn38xx;
2994 	struct cvmx_mio_uartx_thr_s cn38xxp2;
2995 	struct cvmx_mio_uartx_thr_s cn50xx;
2996 	struct cvmx_mio_uartx_thr_s cn52xx;
2997 	struct cvmx_mio_uartx_thr_s cn52xxp1;
2998 	struct cvmx_mio_uartx_thr_s cn56xx;
2999 	struct cvmx_mio_uartx_thr_s cn56xxp1;
3000 	struct cvmx_mio_uartx_thr_s cn58xx;
3001 	struct cvmx_mio_uartx_thr_s cn58xxp1;
3002 	struct cvmx_mio_uartx_thr_s cn61xx;
3003 	struct cvmx_mio_uartx_thr_s cn63xx;
3004 	struct cvmx_mio_uartx_thr_s cn63xxp1;
3005 	struct cvmx_mio_uartx_thr_s cn66xx;
3006 	struct cvmx_mio_uartx_thr_s cn68xx;
3007 	struct cvmx_mio_uartx_thr_s cn68xxp1;
3008 };
3009 
3010 union cvmx_mio_uartx_usr {
3011 	uint64_t u64;
3012 	struct cvmx_mio_uartx_usr_s {
3013 		uint64_t reserved_5_63:59;
3014 		uint64_t rff:1;
3015 		uint64_t rfne:1;
3016 		uint64_t tfe:1;
3017 		uint64_t tfnf:1;
3018 		uint64_t busy:1;
3019 	} s;
3020 	struct cvmx_mio_uartx_usr_s cn30xx;
3021 	struct cvmx_mio_uartx_usr_s cn31xx;
3022 	struct cvmx_mio_uartx_usr_s cn38xx;
3023 	struct cvmx_mio_uartx_usr_s cn38xxp2;
3024 	struct cvmx_mio_uartx_usr_s cn50xx;
3025 	struct cvmx_mio_uartx_usr_s cn52xx;
3026 	struct cvmx_mio_uartx_usr_s cn52xxp1;
3027 	struct cvmx_mio_uartx_usr_s cn56xx;
3028 	struct cvmx_mio_uartx_usr_s cn56xxp1;
3029 	struct cvmx_mio_uartx_usr_s cn58xx;
3030 	struct cvmx_mio_uartx_usr_s cn58xxp1;
3031 	struct cvmx_mio_uartx_usr_s cn61xx;
3032 	struct cvmx_mio_uartx_usr_s cn63xx;
3033 	struct cvmx_mio_uartx_usr_s cn63xxp1;
3034 	struct cvmx_mio_uartx_usr_s cn66xx;
3035 	struct cvmx_mio_uartx_usr_s cn68xx;
3036 	struct cvmx_mio_uartx_usr_s cn68xxp1;
3037 };
3038 
3039 union cvmx_mio_uart2_dlh {
3040 	uint64_t u64;
3041 	struct cvmx_mio_uart2_dlh_s {
3042 		uint64_t reserved_8_63:56;
3043 		uint64_t dlh:8;
3044 	} s;
3045 	struct cvmx_mio_uart2_dlh_s cn52xx;
3046 	struct cvmx_mio_uart2_dlh_s cn52xxp1;
3047 };
3048 
3049 union cvmx_mio_uart2_dll {
3050 	uint64_t u64;
3051 	struct cvmx_mio_uart2_dll_s {
3052 		uint64_t reserved_8_63:56;
3053 		uint64_t dll:8;
3054 	} s;
3055 	struct cvmx_mio_uart2_dll_s cn52xx;
3056 	struct cvmx_mio_uart2_dll_s cn52xxp1;
3057 };
3058 
3059 union cvmx_mio_uart2_far {
3060 	uint64_t u64;
3061 	struct cvmx_mio_uart2_far_s {
3062 		uint64_t reserved_1_63:63;
3063 		uint64_t far:1;
3064 	} s;
3065 	struct cvmx_mio_uart2_far_s cn52xx;
3066 	struct cvmx_mio_uart2_far_s cn52xxp1;
3067 };
3068 
3069 union cvmx_mio_uart2_fcr {
3070 	uint64_t u64;
3071 	struct cvmx_mio_uart2_fcr_s {
3072 		uint64_t reserved_8_63:56;
3073 		uint64_t rxtrig:2;
3074 		uint64_t txtrig:2;
3075 		uint64_t reserved_3_3:1;
3076 		uint64_t txfr:1;
3077 		uint64_t rxfr:1;
3078 		uint64_t en:1;
3079 	} s;
3080 	struct cvmx_mio_uart2_fcr_s cn52xx;
3081 	struct cvmx_mio_uart2_fcr_s cn52xxp1;
3082 };
3083 
3084 union cvmx_mio_uart2_htx {
3085 	uint64_t u64;
3086 	struct cvmx_mio_uart2_htx_s {
3087 		uint64_t reserved_1_63:63;
3088 		uint64_t htx:1;
3089 	} s;
3090 	struct cvmx_mio_uart2_htx_s cn52xx;
3091 	struct cvmx_mio_uart2_htx_s cn52xxp1;
3092 };
3093 
3094 union cvmx_mio_uart2_ier {
3095 	uint64_t u64;
3096 	struct cvmx_mio_uart2_ier_s {
3097 		uint64_t reserved_8_63:56;
3098 		uint64_t ptime:1;
3099 		uint64_t reserved_4_6:3;
3100 		uint64_t edssi:1;
3101 		uint64_t elsi:1;
3102 		uint64_t etbei:1;
3103 		uint64_t erbfi:1;
3104 	} s;
3105 	struct cvmx_mio_uart2_ier_s cn52xx;
3106 	struct cvmx_mio_uart2_ier_s cn52xxp1;
3107 };
3108 
3109 union cvmx_mio_uart2_iir {
3110 	uint64_t u64;
3111 	struct cvmx_mio_uart2_iir_s {
3112 		uint64_t reserved_8_63:56;
3113 		uint64_t fen:2;
3114 		uint64_t reserved_4_5:2;
3115 		uint64_t iid:4;
3116 	} s;
3117 	struct cvmx_mio_uart2_iir_s cn52xx;
3118 	struct cvmx_mio_uart2_iir_s cn52xxp1;
3119 };
3120 
3121 union cvmx_mio_uart2_lcr {
3122 	uint64_t u64;
3123 	struct cvmx_mio_uart2_lcr_s {
3124 		uint64_t reserved_8_63:56;
3125 		uint64_t dlab:1;
3126 		uint64_t brk:1;
3127 		uint64_t reserved_5_5:1;
3128 		uint64_t eps:1;
3129 		uint64_t pen:1;
3130 		uint64_t stop:1;
3131 		uint64_t cls:2;
3132 	} s;
3133 	struct cvmx_mio_uart2_lcr_s cn52xx;
3134 	struct cvmx_mio_uart2_lcr_s cn52xxp1;
3135 };
3136 
3137 union cvmx_mio_uart2_lsr {
3138 	uint64_t u64;
3139 	struct cvmx_mio_uart2_lsr_s {
3140 		uint64_t reserved_8_63:56;
3141 		uint64_t ferr:1;
3142 		uint64_t temt:1;
3143 		uint64_t thre:1;
3144 		uint64_t bi:1;
3145 		uint64_t fe:1;
3146 		uint64_t pe:1;
3147 		uint64_t oe:1;
3148 		uint64_t dr:1;
3149 	} s;
3150 	struct cvmx_mio_uart2_lsr_s cn52xx;
3151 	struct cvmx_mio_uart2_lsr_s cn52xxp1;
3152 };
3153 
3154 union cvmx_mio_uart2_mcr {
3155 	uint64_t u64;
3156 	struct cvmx_mio_uart2_mcr_s {
3157 		uint64_t reserved_6_63:58;
3158 		uint64_t afce:1;
3159 		uint64_t loop:1;
3160 		uint64_t out2:1;
3161 		uint64_t out1:1;
3162 		uint64_t rts:1;
3163 		uint64_t dtr:1;
3164 	} s;
3165 	struct cvmx_mio_uart2_mcr_s cn52xx;
3166 	struct cvmx_mio_uart2_mcr_s cn52xxp1;
3167 };
3168 
3169 union cvmx_mio_uart2_msr {
3170 	uint64_t u64;
3171 	struct cvmx_mio_uart2_msr_s {
3172 		uint64_t reserved_8_63:56;
3173 		uint64_t dcd:1;
3174 		uint64_t ri:1;
3175 		uint64_t dsr:1;
3176 		uint64_t cts:1;
3177 		uint64_t ddcd:1;
3178 		uint64_t teri:1;
3179 		uint64_t ddsr:1;
3180 		uint64_t dcts:1;
3181 	} s;
3182 	struct cvmx_mio_uart2_msr_s cn52xx;
3183 	struct cvmx_mio_uart2_msr_s cn52xxp1;
3184 };
3185 
3186 union cvmx_mio_uart2_rbr {
3187 	uint64_t u64;
3188 	struct cvmx_mio_uart2_rbr_s {
3189 		uint64_t reserved_8_63:56;
3190 		uint64_t rbr:8;
3191 	} s;
3192 	struct cvmx_mio_uart2_rbr_s cn52xx;
3193 	struct cvmx_mio_uart2_rbr_s cn52xxp1;
3194 };
3195 
3196 union cvmx_mio_uart2_rfl {
3197 	uint64_t u64;
3198 	struct cvmx_mio_uart2_rfl_s {
3199 		uint64_t reserved_7_63:57;
3200 		uint64_t rfl:7;
3201 	} s;
3202 	struct cvmx_mio_uart2_rfl_s cn52xx;
3203 	struct cvmx_mio_uart2_rfl_s cn52xxp1;
3204 };
3205 
3206 union cvmx_mio_uart2_rfw {
3207 	uint64_t u64;
3208 	struct cvmx_mio_uart2_rfw_s {
3209 		uint64_t reserved_10_63:54;
3210 		uint64_t rffe:1;
3211 		uint64_t rfpe:1;
3212 		uint64_t rfwd:8;
3213 	} s;
3214 	struct cvmx_mio_uart2_rfw_s cn52xx;
3215 	struct cvmx_mio_uart2_rfw_s cn52xxp1;
3216 };
3217 
3218 union cvmx_mio_uart2_sbcr {
3219 	uint64_t u64;
3220 	struct cvmx_mio_uart2_sbcr_s {
3221 		uint64_t reserved_1_63:63;
3222 		uint64_t sbcr:1;
3223 	} s;
3224 	struct cvmx_mio_uart2_sbcr_s cn52xx;
3225 	struct cvmx_mio_uart2_sbcr_s cn52xxp1;
3226 };
3227 
3228 union cvmx_mio_uart2_scr {
3229 	uint64_t u64;
3230 	struct cvmx_mio_uart2_scr_s {
3231 		uint64_t reserved_8_63:56;
3232 		uint64_t scr:8;
3233 	} s;
3234 	struct cvmx_mio_uart2_scr_s cn52xx;
3235 	struct cvmx_mio_uart2_scr_s cn52xxp1;
3236 };
3237 
3238 union cvmx_mio_uart2_sfe {
3239 	uint64_t u64;
3240 	struct cvmx_mio_uart2_sfe_s {
3241 		uint64_t reserved_1_63:63;
3242 		uint64_t sfe:1;
3243 	} s;
3244 	struct cvmx_mio_uart2_sfe_s cn52xx;
3245 	struct cvmx_mio_uart2_sfe_s cn52xxp1;
3246 };
3247 
3248 union cvmx_mio_uart2_srr {
3249 	uint64_t u64;
3250 	struct cvmx_mio_uart2_srr_s {
3251 		uint64_t reserved_3_63:61;
3252 		uint64_t stfr:1;
3253 		uint64_t srfr:1;
3254 		uint64_t usr:1;
3255 	} s;
3256 	struct cvmx_mio_uart2_srr_s cn52xx;
3257 	struct cvmx_mio_uart2_srr_s cn52xxp1;
3258 };
3259 
3260 union cvmx_mio_uart2_srt {
3261 	uint64_t u64;
3262 	struct cvmx_mio_uart2_srt_s {
3263 		uint64_t reserved_2_63:62;
3264 		uint64_t srt:2;
3265 	} s;
3266 	struct cvmx_mio_uart2_srt_s cn52xx;
3267 	struct cvmx_mio_uart2_srt_s cn52xxp1;
3268 };
3269 
3270 union cvmx_mio_uart2_srts {
3271 	uint64_t u64;
3272 	struct cvmx_mio_uart2_srts_s {
3273 		uint64_t reserved_1_63:63;
3274 		uint64_t srts:1;
3275 	} s;
3276 	struct cvmx_mio_uart2_srts_s cn52xx;
3277 	struct cvmx_mio_uart2_srts_s cn52xxp1;
3278 };
3279 
3280 union cvmx_mio_uart2_stt {
3281 	uint64_t u64;
3282 	struct cvmx_mio_uart2_stt_s {
3283 		uint64_t reserved_2_63:62;
3284 		uint64_t stt:2;
3285 	} s;
3286 	struct cvmx_mio_uart2_stt_s cn52xx;
3287 	struct cvmx_mio_uart2_stt_s cn52xxp1;
3288 };
3289 
3290 union cvmx_mio_uart2_tfl {
3291 	uint64_t u64;
3292 	struct cvmx_mio_uart2_tfl_s {
3293 		uint64_t reserved_7_63:57;
3294 		uint64_t tfl:7;
3295 	} s;
3296 	struct cvmx_mio_uart2_tfl_s cn52xx;
3297 	struct cvmx_mio_uart2_tfl_s cn52xxp1;
3298 };
3299 
3300 union cvmx_mio_uart2_tfr {
3301 	uint64_t u64;
3302 	struct cvmx_mio_uart2_tfr_s {
3303 		uint64_t reserved_8_63:56;
3304 		uint64_t tfr:8;
3305 	} s;
3306 	struct cvmx_mio_uart2_tfr_s cn52xx;
3307 	struct cvmx_mio_uart2_tfr_s cn52xxp1;
3308 };
3309 
3310 union cvmx_mio_uart2_thr {
3311 	uint64_t u64;
3312 	struct cvmx_mio_uart2_thr_s {
3313 		uint64_t reserved_8_63:56;
3314 		uint64_t thr:8;
3315 	} s;
3316 	struct cvmx_mio_uart2_thr_s cn52xx;
3317 	struct cvmx_mio_uart2_thr_s cn52xxp1;
3318 };
3319 
3320 union cvmx_mio_uart2_usr {
3321 	uint64_t u64;
3322 	struct cvmx_mio_uart2_usr_s {
3323 		uint64_t reserved_5_63:59;
3324 		uint64_t rff:1;
3325 		uint64_t rfne:1;
3326 		uint64_t tfe:1;
3327 		uint64_t tfnf:1;
3328 		uint64_t busy:1;
3329 	} s;
3330 	struct cvmx_mio_uart2_usr_s cn52xx;
3331 	struct cvmx_mio_uart2_usr_s cn52xxp1;
3332 };
3333 
3334 #endif
3335