1 /*
2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
3  *
4  *  Hardware request structures
5  *
6  *  Authors: Waleri Fomin <fomin@de.ibm.com>
7  *           Reinhard Ernst <rernst@de.ibm.com>
8  *           Christoph Raisch <raisch@de.ibm.com>
9  *
10  *  Copyright (c) 2005 IBM Corporation
11  *
12  *  All rights reserved.
13  *
14  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
15  *  BSD.
16  *
17  * OpenIB BSD License
18  *
19  * Redistribution and use in source and binary forms, with or without
20  * modification, are permitted provided that the following conditions are met:
21  *
22  * Redistributions of source code must retain the above copyright notice, this
23  * list of conditions and the following disclaimer.
24  *
25  * Redistributions in binary form must reproduce the above copyright notice,
26  * this list of conditions and the following disclaimer in the documentation
27  * and/or other materials
28  * provided with the distribution.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
34  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
37  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
38  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40  * POSSIBILITY OF SUCH DAMAGE.
41  */
42 
43 
44 #ifndef _EHCA_QES_H_
45 #define _EHCA_QES_H_
46 
47 #include "ehca_tools.h"
48 
49 /* virtual scatter gather entry to specify remote addresses with length */
50 struct ehca_vsgentry {
51 	u64 vaddr;
52 	u32 lkey;
53 	u32 length;
54 };
55 
56 #define GRH_FLAG_MASK        EHCA_BMASK_IBM( 7,  7)
57 #define GRH_IPVERSION_MASK   EHCA_BMASK_IBM( 0,  3)
58 #define GRH_TCLASS_MASK      EHCA_BMASK_IBM( 4, 12)
59 #define GRH_FLOWLABEL_MASK   EHCA_BMASK_IBM(13, 31)
60 #define GRH_PAYLEN_MASK      EHCA_BMASK_IBM(32, 47)
61 #define GRH_NEXTHEADER_MASK  EHCA_BMASK_IBM(48, 55)
62 #define GRH_HOPLIMIT_MASK    EHCA_BMASK_IBM(56, 63)
63 
64 /*
65  * Unreliable Datagram Address Vector Format
66  * see IBTA Vol1 chapter 8.3 Global Routing Header
67  */
68 struct ehca_ud_av {
69 	u8 sl;
70 	u8 lnh;
71 	u16 dlid;
72 	u8 reserved1;
73 	u8 reserved2;
74 	u8 reserved3;
75 	u8 slid_path_bits;
76 	u8 reserved4;
77 	u8 ipd;
78 	u8 reserved5;
79 	u8 pmtu;
80 	u32 reserved6;
81 	u64 reserved7;
82 	union {
83 		struct {
84 			u64 word_0; /* always set to 6  */
85 			/*should be 0x1B for IB transport */
86 			u64 word_1;
87 			u64 word_2;
88 			u64 word_3;
89 			u64 word_4;
90 		} grh;
91 		struct {
92 			u32 wd_0;
93 			u32 wd_1;
94 			/* DWord_1 --> SGID */
95 
96 			u32 sgid_wd3;
97 			u32 sgid_wd2;
98 
99 			u32 sgid_wd1;
100 			u32 sgid_wd0;
101 			/* DWord_3 --> DGID */
102 
103 			u32 dgid_wd3;
104 			u32 dgid_wd2;
105 
106 			u32 dgid_wd1;
107 			u32 dgid_wd0;
108 		} grh_l;
109 	};
110 };
111 
112 /* maximum number of sg entries allowed in a WQE */
113 #define MAX_WQE_SG_ENTRIES 252
114 
115 #define WQE_OPTYPE_SEND             0x80
116 #define WQE_OPTYPE_RDMAREAD         0x40
117 #define WQE_OPTYPE_RDMAWRITE        0x20
118 #define WQE_OPTYPE_CMPSWAP          0x10
119 #define WQE_OPTYPE_FETCHADD         0x08
120 #define WQE_OPTYPE_BIND             0x04
121 
122 #define WQE_WRFLAG_REQ_SIGNAL_COM   0x80
123 #define WQE_WRFLAG_FENCE            0x40
124 #define WQE_WRFLAG_IMM_DATA_PRESENT 0x20
125 #define WQE_WRFLAG_SOLIC_EVENT      0x10
126 
127 #define WQEF_CACHE_HINT             0x80
128 #define WQEF_CACHE_HINT_RD_WR       0x40
129 #define WQEF_TIMED_WQE              0x20
130 #define WQEF_PURGE                  0x08
131 #define WQEF_HIGH_NIBBLE            0xF0
132 
133 #define MW_BIND_ACCESSCTRL_R_WRITE   0x40
134 #define MW_BIND_ACCESSCTRL_R_READ    0x20
135 #define MW_BIND_ACCESSCTRL_R_ATOMIC  0x10
136 
137 struct ehca_wqe {
138 	u64 work_request_id;
139 	u8 optype;
140 	u8 wr_flag;
141 	u16 pkeyi;
142 	u8 wqef;
143 	u8 nr_of_data_seg;
144 	u16 wqe_provided_slid;
145 	u32 destination_qp_number;
146 	u32 resync_psn_sqp;
147 	u32 local_ee_context_qkey;
148 	u32 immediate_data;
149 	union {
150 		struct {
151 			u64 remote_virtual_address;
152 			u32 rkey;
153 			u32 reserved;
154 			u64 atomic_1st_op_dma_len;
155 			u64 atomic_2nd_op;
156 			struct ehca_vsgentry sg_list[MAX_WQE_SG_ENTRIES];
157 
158 		} nud;
159 		struct {
160 			u64 ehca_ud_av_ptr;
161 			u64 reserved1;
162 			u64 reserved2;
163 			u64 reserved3;
164 			struct ehca_vsgentry sg_list[MAX_WQE_SG_ENTRIES];
165 		} ud_avp;
166 		struct {
167 			struct ehca_ud_av ud_av;
168 			struct ehca_vsgentry sg_list[MAX_WQE_SG_ENTRIES -
169 						     2];
170 		} ud_av;
171 		struct {
172 			u64 reserved0;
173 			u64 reserved1;
174 			u64 reserved2;
175 			u64 reserved3;
176 			struct ehca_vsgentry sg_list[MAX_WQE_SG_ENTRIES];
177 		} all_rcv;
178 
179 		struct {
180 			u64 reserved;
181 			u32 rkey;
182 			u32 old_rkey;
183 			u64 reserved1;
184 			u64 reserved2;
185 			u64 virtual_address;
186 			u32 reserved3;
187 			u32 length;
188 			u32 reserved4;
189 			u16 reserved5;
190 			u8 reserved6;
191 			u8 lr_ctl;
192 			u32 lkey;
193 			u32 reserved7;
194 			u64 reserved8;
195 			u64 reserved9;
196 			u64 reserved10;
197 			u64 reserved11;
198 		} bind;
199 		struct {
200 			u64 reserved12;
201 			u64 reserved13;
202 			u32 size;
203 			u32 start;
204 		} inline_data;
205 	} u;
206 
207 };
208 
209 #define WC_SEND_RECEIVE EHCA_BMASK_IBM(0, 0)
210 #define WC_IMM_DATA     EHCA_BMASK_IBM(1, 1)
211 #define WC_GRH_PRESENT  EHCA_BMASK_IBM(2, 2)
212 #define WC_SE_BIT       EHCA_BMASK_IBM(3, 3)
213 #define WC_STATUS_ERROR_BIT 0x80000000
214 #define WC_STATUS_REMOTE_ERROR_FLAGS 0x0000F800
215 #define WC_STATUS_PURGE_BIT 0x10
216 #define WC_SEND_RECEIVE_BIT 0x80
217 
218 struct ehca_cqe {
219 	u64 work_request_id;
220 	u8 optype;
221 	u8 w_completion_flags;
222 	u16 reserved1;
223 	u32 nr_bytes_transferred;
224 	u32 immediate_data;
225 	u32 local_qp_number;
226 	u8 freed_resource_count;
227 	u8 service_level;
228 	u16 wqe_count;
229 	u32 qp_token;
230 	u32 qkey_ee_token;
231 	u32 remote_qp_number;
232 	u16 dlid;
233 	u16 rlid;
234 	u16 reserved2;
235 	u16 pkey_index;
236 	u32 cqe_timestamp;
237 	u32 wqe_timestamp;
238 	u8 wqe_timestamp_valid;
239 	u8 reserved3;
240 	u8 reserved4;
241 	u8 cqe_flags;
242 	u32 status;
243 };
244 
245 struct ehca_eqe {
246 	u64 entry;
247 };
248 
249 struct ehca_mrte {
250 	u64 starting_va;
251 	u64 length; /* length of memory region in bytes*/
252 	u32 pd;
253 	u8 key_instance;
254 	u8 pagesize;
255 	u8 mr_control;
256 	u8 local_remote_access_ctrl;
257 	u8 reserved[0x20 - 0x18];
258 	u64 at_pointer[4];
259 };
260 #endif /*_EHCA_QES_H_*/
261