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Searched refs:scr_addr (Results 1 – 15 of 15) sorted by relevance

/linux-3.4.99/drivers/ata/
Dsata_sis.c167 void __iomem *base = ap->ioaddr.scr_addr + link->pmp * 0x10; in sis_scr_read()
182 void __iomem *base = ap->ioaddr.scr_addr + link->pmp * 0x10; in sis_scr_write()
301 host->ports[0]->ioaddr.scr_addr = mmio; in sis_init_one()
302 host->ports[1]->ioaddr.scr_addr = mmio + port2_start; in sis_init_one()
Dsata_promise.c366 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_sata_port_start()
379 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_fpdma_clear_interrupt_flag()
394 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_fpdma_reset()
412 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_not_at_command_packet_phase()
428 void __iomem *sata_mmio = ap->ioaddr.scr_addr; in pdc_clear_internal_debug_record_error_register()
489 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in pdc_sata_scr_read()
498 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in pdc_sata_scr_write()
1111 void __iomem *base, void __iomem *scr_addr) in pdc_ata_setup_port() argument
1126 ap->ioaddr.scr_addr = scr_addr; in pdc_ata_setup_port()
Dsata_via.c192 *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg)); in svia_scr_read()
200 iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg)); in svia_scr_write()
451 ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no); in vt6421_init_addrs()
476 host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0); in vt6420_prepare_host()
477 host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1); in vt6420_prepare_host()
Dsata_vsc.c106 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in vsc_sata_scr_read()
116 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in vsc_sata_scr_write()
332 port->scr_addr = base + VSC_SATA_SCR_STATUS_OFFSET; in vsc_sata_setup_port()
Dsata_nv.c1526 irq_stat = ioread8(host->ports[0]->ioaddr.scr_addr + NV_INT_STATUS); in nv_nf2_interrupt()
1552 *val = ioread32(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in nv_scr_read()
1561 iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in nv_scr_write()
1599 void __iomem *scr_addr = ap->host->ports[0]->ioaddr.scr_addr; in nv_nf2_freeze() local
1603 mask = ioread8(scr_addr + NV_INT_ENABLE); in nv_nf2_freeze()
1605 iowrite8(mask, scr_addr + NV_INT_ENABLE); in nv_nf2_freeze()
1610 void __iomem *scr_addr = ap->host->ports[0]->ioaddr.scr_addr; in nv_nf2_thaw() local
1614 iowrite8(NV_INT_ALL << shift, scr_addr + NV_INT_STATUS); in nv_nf2_thaw()
1616 mask = ioread8(scr_addr + NV_INT_ENABLE); in nv_nf2_thaw()
1618 iowrite8(mask, scr_addr + NV_INT_ENABLE); in nv_nf2_thaw()
[all …]
Dsata_inic162x.c287 void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; in inic_scr_read() local
293 addr = scr_addr + scr_map[sc_reg] * 4; in inic_scr_read()
294 *val = readl(scr_addr + scr_map[sc_reg] * 4); in inic_scr_read()
304 void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; in inic_scr_write() local
309 writel(val, scr_addr + scr_map[sc_reg] * 4); in inic_scr_write()
Dsata_svw.c131 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in k2_sata_scr_read()
141 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in k2_sata_scr_write()
446 port->scr_addr = base + K2_SATA_SCR_STATUS_OFFSET; in k2_sata_setup_port()
Dsata_sil24.c506 void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; in sil24_scr_read() local
510 addr = scr_addr + sil24_scr_map[sc_reg] * 4; in sil24_scr_read()
511 *val = readl(scr_addr + sil24_scr_map[sc_reg] * 4); in sil24_scr_read()
519 void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; in sil24_scr_write() local
523 addr = scr_addr + sil24_scr_map[sc_reg] * 4; in sil24_scr_write()
524 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); in sil24_scr_write()
Dsata_qstor.c235 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 8)); in qs_scr_read()
249 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 8)); in qs_scr_write()
479 port->scr_addr = base + 0xc00; in qs_ata_setup_port()
Dpata_hpt3x3.c241 ioaddr->scr_addr = NULL; in hpt3x3_init_one()
Dsata_sil.c396 void __iomem *offset = ap->ioaddr.scr_addr; in sil_scr_addr()
791 ioaddr->scr_addr = mmio_base + sil_port[i].scr; in sil_init_one()
Dsata_dwc_460ex.c820 *val = in_le32((void *)link->ap->ioaddr.scr_addr + (scr * 4)); in sata_dwc_scr_read()
836 out_le32((void *)link->ap->ioaddr.scr_addr + (scr * 4), val); in sata_dwc_scr_write()
1676 host->ports[0]->ioaddr.scr_addr = base + SATA_DWC_SCR_OFFSET; in sata_dwc_probe()
/linux-3.4.99/arch/mips/include/asm/octeon/
Dcvmx-fpa.h193 static inline void cvmx_fpa_async_alloc(uint64_t scr_addr, uint64_t pool) in cvmx_fpa_async_alloc() argument
201 data.s.scraddr = scr_addr >> 3; in cvmx_fpa_async_alloc()
Dcvmx-pow.h1192 static inline void cvmx_pow_work_request_async_nocheck(int scr_addr, in cvmx_pow_work_request_async_nocheck() argument
1201 data.s.scraddr = scr_addr >> 3; in cvmx_pow_work_request_async_nocheck()
1221 static inline void cvmx_pow_work_request_async(int scr_addr, in cvmx_pow_work_request_async() argument
1229 cvmx_pow_work_request_async_nocheck(scr_addr, wait); in cvmx_pow_work_request_async()
1242 static inline cvmx_wqe_t *cvmx_pow_work_response_async(int scr_addr) in cvmx_pow_work_response_async() argument
1247 result.u64 = cvmx_scratch_read64(scr_addr); in cvmx_pow_work_response_async()
/linux-3.4.99/include/linux/
Dlibata.h533 void __iomem *scr_addr; member