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Searched refs:scale_reg (Results 1 – 2 of 2) sorted by relevance

/linux-3.4.99/arch/arm/mach-pnx4008/
Dclock.c92 while (i++ < 0xFFF && !(__raw_readl(clk->scale_reg) & 1)) ; /*wait for PLL to lock */ in clk_wait_for_pll_lock()
94 if (!(__raw_readl(clk->scale_reg) & 1)) { in clk_wait_for_pll_lock()
97 clk->name, __raw_readl(clk->scale_reg)); in clk_wait_for_pll_lock()
211 tmp_reg = __raw_readl(clk->scale_reg); in pll160_set_rate()
213 __raw_writel(tmp_reg, clk->scale_reg); in pll160_set_rate()
227 tmp_reg = __raw_readl(clk->scale_reg); in pll160_set_rate()
232 __raw_writel(tmp_reg, clk->scale_reg); in pll160_set_rate()
256 __raw_writel(tmp_reg, clk->scale_reg); in pll160_set_rate()
262 tmp_reg = __raw_readl(clk->scale_reg); in pll160_set_rate()
264 __raw_writel(tmp_reg, clk->scale_reg); in pll160_set_rate()
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Dclock.h24 u32 scale_reg; member