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Searched refs:saif0_clk (Results 1 – 1 of 1) sorted by relevance

/linux-3.4.99/arch/arm/mach-mxs/
Dclock-mx28.c45 static struct clk saif0_clk; variable
283 if (clk == &saif0_clk || clk == &saif1_clk) \
297 _CLK_GET_RATE1(saif0_clk, SAIF0)
468 _CLK_SET_RATE_SAIF(saif0_clk, SAIF0)
509 _CLK_SET_PARENT(saif0_clk, SAIF0)
596 _DEFINE_CLOCK(saif0_clk, SAIF0, CLKGATE, &ref_xtal_clk);
649 _REGISTER_CLOCK("mxs-saif.0", NULL, saif0_clk)
676 saif0_clk.parent = (reg & BM_CLKCTRL_CLKSEQ_BYPASS_SAIF0) ? in clk_misc_init()
786 clk_set_parent(&saif0_clk, &pll0_clk); in mx28_clocks_init()
795 clk_set_rate(&saif0_clk, 24000000); in mx28_clocks_init()