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/linux-3.4.99/arch/m68k/platform/coldfire/
DMakefile18 obj-$(CONFIG_M5206) += timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += timers.o intc.o reset.o
20 obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o
21 obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o
22 obj-$(CONFIG_M5249) += timers.o intc.o reset.o
23 obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o
25 obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o
26 obj-$(CONFIG_M5307) += timers.o intc.o reset.o
27 obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o
28 obj-$(CONFIG_M5407) += timers.o intc.o reset.o
/linux-3.4.99/arch/cris/arch-v10/kernel/
Ddma.c231 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, reset); in cris_free_dma()
233 IO_STATE_VALUE(R_DMA_CH0_CMD, cmd, reset)); in cris_free_dma()
236 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, reset); in cris_free_dma()
238 IO_STATE_VALUE(R_DMA_CH1_CMD, cmd, reset)); in cris_free_dma()
241 *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, reset); in cris_free_dma()
243 IO_STATE_VALUE(R_DMA_CH2_CMD, cmd, reset)); in cris_free_dma()
246 *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, reset); in cris_free_dma()
248 IO_STATE_VALUE(R_DMA_CH3_CMD, cmd, reset)); in cris_free_dma()
251 *R_DMA_CH4_CMD = IO_STATE(R_DMA_CH4_CMD, cmd, reset); in cris_free_dma()
253 IO_STATE_VALUE(R_DMA_CH4_CMD, cmd, reset)); in cris_free_dma()
[all …]
/linux-3.4.99/Documentation/devicetree/bindings/powerpc/4xx/
Dreboot.txt4 software reset mechanism may be overidden. Here the possible values of
7 1 - PPC4xx core reset
8 2 - PPC4xx chip reset
9 3 - PPC4xx system reset (default)
17 reset-type = <2>; /* Use chip-reset */
/linux-3.4.99/arch/arm/mach-u300/
Dclock.c130 clk->reset = true; in syscon_block_reset_enable()
146 clk->reset = false; in syscon_block_reset_disable()
705 .reset = false,
719 .reset = true,
732 .reset = true,
747 .reset = false,
760 .reset = true,
774 .reset = true,
789 .reset = true,
803 .reset = true,
[all …]
/linux-3.4.99/drivers/net/ethernet/mellanox/mlx4/
Dreset.c44 void __iomem *reset; in mlx4_reset() local
93 reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE, in mlx4_reset()
95 if (!reset) { in mlx4_reset()
104 sem = readl(reset + MLX4_SEM_OFFSET); in mlx4_reset()
114 iounmap(reset); in mlx4_reset()
119 writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); in mlx4_reset()
120 iounmap(reset); in mlx4_reset()
/linux-3.4.99/arch/arm/plat-s5p/
Dsetup-mipiphy.c18 bool on, u32 reset) in __s5p_mipi_phy_control() argument
39 cfg = on ? (cfg | reset) : (cfg & ~reset); in __s5p_mipi_phy_control()
45 S5P_MIPI_DPHY_MRESETN) & ~reset)) { in __s5p_mipi_phy_control()
/linux-3.4.99/Documentation/PCI/
Dpci-error-recovery.txt21 offered, so that the affected PCI device(s) are reset and put back
22 into working condition. The reset phase requires coordination
41 of reset it desires, the choices being a simple re-enabling of I/O
42 or requesting a slot reset.
44 If any driver requests a slot reset, that is what will be done.
46 After a reset and/or a re-enabling of I/O, all drivers are
96 PCI_ERS_RESULT_CAN_RECOVER, /* Device driver can recover without slot reset */
97 PCI_ERS_RESULT_NEED_RESET, /* Device driver wants slot to be reset. */
107 a slot reset. If link_reset() is not implemented, the card is assumed to
146 slot reset.
[all …]
/linux-3.4.99/drivers/isdn/hisax/
Disurf.c126 release_region(cs->hw.isurf.reset, 1); in release_io_isurf()
136 byteout(cs->hw.isurf.reset, chips); /* Reset On */ in reset_isurf()
138 byteout(cs->hw.isurf.reset, ISURF_ISAR_EA); /* Reset Off */ in reset_isurf()
213 cs->hw.isurf.reset = card->para[1]; in setup_isurf()
234 cs->hw.isurf.reset = pnp_port_start(pnp_d, 0); in setup_isurf()
237 if (!cs->irq || !cs->hw.isurf.reset || !cs->hw.isurf.phymem) { in setup_isurf()
239 cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem); in setup_isurf()
256 if (!request_region(cs->hw.isurf.reset, 1, "isurf isdn")) { in setup_isurf()
259 cs->hw.isurf.reset); in setup_isurf()
267 release_region(cs->hw.isurf.reset, 1); in setup_isurf()
[all …]
/linux-3.4.99/arch/powerpc/platforms/52xx/
Dmpc52xx_common.c285 int reset; in mpc5200_psc_ac97_gpio_reset() local
293 reset = PSC1_RESET; /* AC97_1_RES */ in mpc5200_psc_ac97_gpio_reset()
299 reset = PSC2_RESET; /* AC97_2_RES */ in mpc5200_psc_ac97_gpio_reset()
317 setbits8(&wkup_gpio->wkup_gpioe, reset); in mpc5200_psc_ac97_gpio_reset()
320 setbits8(&wkup_gpio->wkup_ddr, reset); in mpc5200_psc_ac97_gpio_reset()
325 clrbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
331 setbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
/linux-3.4.99/arch/alpha/oprofile/
Dop_model_ev6.c25 unsigned long ctl, reset, need_reset, i; in ev6_reg_setup() local
46 reset = need_reset = 0; in ev6_reg_setup()
55 reset |= (0x100000 - count) << (i ? 6 : 28); in ev6_reg_setup()
59 reg->reset_values = reset; in ev6_reg_setup()
Dop_model_ev5.c31 int i, ctl, reset, need_reset; in common_reg_setup() local
90 ctl = reset = need_reset = 0; in common_reg_setup()
107 reset |= (max - count) << (48 - 16*i); in common_reg_setup()
112 reg->reset_values = reset; in common_reg_setup()
/linux-3.4.99/drivers/net/can/softing/
Dsofting_cs.c50 .reset = softingcs_reset,
62 .reset = softingcs_reset,
74 .reset = softingcs_reset,
86 .reset = softingcs_reset,
98 .reset = softingcs_reset,
110 .reset = softingcs_reset,
122 .reset = softingcs_reset,
134 .reset = softingcs_reset,
146 .reset = softingcs_reset,
/linux-3.4.99/drivers/input/keyboard/
Dsunkbd.c86 volatile s8 reset; member
100 if (sunkbd->reset <= -1) { in sunkbd_interrupt()
105 sunkbd->reset = data; in sunkbd_interrupt()
120 sunkbd->reset = -1; in sunkbd_interrupt()
197 sunkbd->reset = -2; in sunkbd_initialize()
199 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ); in sunkbd_initialize()
200 if (sunkbd->reset < 0) in sunkbd_initialize()
203 sunkbd->type = sunkbd->reset; in sunkbd_initialize()
228 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ); in sunkbd_reinit()
/linux-3.4.99/sound/core/seq/oss/
Dseq_oss_writeq.c80 struct snd_seq_remove_events reset; in snd_seq_oss_writeq_clear() local
82 memset(&reset, 0, sizeof(reset)); in snd_seq_oss_writeq_clear()
83 reset.remove_mode = SNDRV_SEQ_REMOVE_OUTPUT; /* remove all */ in snd_seq_oss_writeq_clear()
84 snd_seq_oss_control(q->dp, SNDRV_SEQ_IOCTL_REMOVE_EVENTS, &reset); in snd_seq_oss_writeq_clear()
/linux-3.4.99/drivers/media/dvb/dvb-usb/
Ddvb-usb-firmware.c39 u8 reset; in usb_cypress_load_firmware() local
43 reset = 1; in usb_cypress_load_firmware()
44 if ((ret = usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1)) != 1) in usb_cypress_load_firmware()
66 reset = 0; in usb_cypress_load_firmware()
67 if (ret || usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1) != 1) { in usb_cypress_load_firmware()
/linux-3.4.99/drivers/watchdog/
Dmpc8xxx_wdt.c60 static bool reset = 1; variable
61 module_param(reset, bool, 0);
62 MODULE_PARM_DESC(reset,
102 reset ? "reset" : "machine check exception"); in mpc8xxx_wdt_pr_warn()
126 if (reset) in mpc8xxx_wdt_open()
232 reset ? "reset" : "interrupt", timeout, timeout_sec); in mpc8xxx_wdt_probe()
/linux-3.4.99/drivers/media/dvb/frontends/
Dlgdt330x.c133 u8 reset[] = { in lgdt3302_SwReset() local
140 reset, sizeof(reset)); in lgdt3302_SwReset()
144 reset[1] = 0x7f; in lgdt3302_SwReset()
146 reset, sizeof(reset)); in lgdt3302_SwReset()
154 u8 reset[] = { in lgdt3303_SwReset() local
160 reset, sizeof(reset)); in lgdt3303_SwReset()
164 reset[1] = 0x01; in lgdt3303_SwReset()
166 reset, sizeof(reset)); in lgdt3303_SwReset()
/linux-3.4.99/drivers/media/dvb/mantis/
Dhopper_vp3028.c50 mantis_gpio_set_bits(mantis, config->reset, 0); in vp3028_frontend_init()
54 mantis_gpio_set_bits(mantis, config->reset, 1); in vp3028_frontend_init()
87 .reset = GPIF_A03,
Dmantis_vp3030.c62 mantis_gpio_set_bits(mantis, config->reset, 0); in vp3030_frontend_init()
66 mantis_gpio_set_bits(mantis, config->reset, 1); in vp3030_frontend_init()
102 .reset = GPIF_A13,
/linux-3.4.99/drivers/block/
Dhd.c115 static int reset; variable
318 if (reset) in hd_out()
321 reset = 1; in hd_out()
371 if (reset) { in reset_hd()
372 reset = 0; in reset_hd()
377 if (reset) in reset_hd()
385 if (reset) in reset_hd()
425 reset = 1; in bad_rw_intr()
541 reset = 1; in hd_times_out()
559 return reset; in do_special_op()
[all …]
/linux-3.4.99/arch/arm/mach-tegra/
Dcommon.c69 void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0); in tegra_assert_system_reset() local
72 reg = readl_relaxed(reset); in tegra_assert_system_reset()
74 writel_relaxed(reg, reset); in tegra_assert_system_reset()
/linux-3.4.99/Documentation/devicetree/bindings/net/
Dfsl-fec.txt10 - phy-reset-gpios : Should specify the gpio for phy reset
22 phy-reset-gpios = <&gpio1 14 0>; /* GPIO2_14 */
/linux-3.4.99/kernel/trace/
Dtrace_selftest.c373 trace->reset(tr); in trace_selftest_startup_dynamic_tracing()
381 trace->reset(tr); in trace_selftest_startup_dynamic_tracing()
434 trace->reset(tr); in trace_selftest_startup_function()
524 trace->reset(tr); in trace_selftest_startup_function_graph()
580 trace->reset(tr); in trace_selftest_startup_irqsoff()
642 trace->reset(tr); in trace_selftest_startup_preemptoff()
750 trace->reset(tr); in trace_selftest_startup_preemptirqsoff()
852 trace->reset(tr); in trace_selftest_startup_wakeup()
889 trace->reset(tr); in trace_selftest_startup_sched_switch()
921 trace->reset(tr); in trace_selftest_startup_branch()
/linux-3.4.99/Documentation/hwmon/
Dw83l786ng16 * reset boolean
18 Use 'reset=1' to reset the chip (via index 0x40, bit 7). The default
19 behavior is no chip reset to preserve BIOS settings
/linux-3.4.99/Documentation/devicetree/bindings/powerpc/fsl/
Dguts.txt4 enabling, power-on-reset configuration monitoring, general-purpose
17 contains a functioning "reset control register" (i.e. the board
18 is wired to reset upon setting the HRESET_REQ bit in this register).

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