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Searched refs:r_clk (Results 1 – 10 of 10) sorted by relevance

/linux-3.4.99/arch/sh/kernel/cpu/sh4a/
Dclock-sh7722.c42 static struct clk r_clk = { variable
73 .parent = &r_clk,
100 &r_clk,
157 [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
158 [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
165 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
168 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
183 CLKDEV_CON_ID("rclk", &r_clk),
Dclock-sh7723.c43 static struct clk r_clk = { variable
74 .parent = &r_clk,
101 &r_clk,
167 [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
168 [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
183 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
193 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
208 CLKDEV_CON_ID("rclk", &r_clk),
Dclock-sh7343.c39 static struct clk r_clk = { variable
70 .parent = &r_clk,
94 &r_clk,
163 [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0),
164 [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0),
183 [MSTP214] = MSTP(&r_clk, MSTPCR2, 14, 0),
199 CLKDEV_CON_ID("rclk", &r_clk),
Dclock-sh7724.c46 static struct clk r_clk = { variable
79 .parent = &r_clk,
128 &r_clk,
228 [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
229 [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
241 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 12, 0),
242 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 11, 0),
273 CLKDEV_CON_ID("rclk", &r_clk),
Dclock-sh7366.c39 static struct clk r_clk = { variable
70 .parent = &r_clk,
97 &r_clk,
166 [MSTP014] = MSTP(&r_clk, MSTPCR0, 14, 0),
167 [MSTP013] = MSTP(&r_clk, MSTPCR0, 13, 0),
197 CLKDEV_CON_ID("rclk", &r_clk),
/linux-3.4.99/arch/arm/mach-shmobile/
Dclock-r8a7740.c144 static struct clk r_clk = { variable
195 &r_clk,
282 [MSTP329] = SH_CLK_MSTP32(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
298 CLKDEV_CON_ID("r_clk", &r_clk),
353 r_clk.parent = &extal1_div2048_clk; in r8a7740_clock_init()
356 r_clk.parent = &extal1_div1024_clk; in r8a7740_clock_init()
360 r_clk.parent = &extalr_clk; in r8a7740_clock_init()
Dclock-sh7367.c51 static struct clk r_clk = { variable
142 &r_clk,
251 [SYMSTP229] = MSTP(&r_clk, SYMSTPCR2, 29, 0), /* CMT10 */
259 [CMMSTP003] = MSTP(&r_clk, CMMSTPCR0, 3, 0), /* KEYSC */
264 CLKDEV_CON_ID("r_clk", &r_clk),
Dclock-sh7377.c54 static struct clk r_clk = { variable
151 &r_clk,
260 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
267 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
272 CLKDEV_CON_ID("r_clk", &r_clk),
Dclock-sh7372.c66 static struct clk r_clk = { variable
306 &r_clk,
567 [MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
568 [MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
569 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
570 [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
576 CLKDEV_CON_ID("r_clk", &r_clk),
Dclock-sh73a0.c65 static struct clk r_clk = { variable
219 &r_clk,
508 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
522 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
527 CLKDEV_CON_ID("r_clk", &r_clk),