/linux-3.4.99/arch/ia64/kernel/ |
D | ivt.S | 113 movl r18=PAGE_SHIFT 127 cmp.ne p8,p0=r18,r26 128 sub r27=r26,r18 130 (p8) dep r25=r18,r25,2,6 135 shr.u r18=r22,PGDIR_SHIFT // get bottom portion of pgd index bit 146 (p6) dep r17=r18,r19,3,(PAGE_SHIFT-3) // r17=pgd_offset for region 5 147 (p7) dep r17=r18,r17,3,(PAGE_SHIFT-6) // r17=pgd_offset for region[0-4] 152 shr.u r18=r22,PMD_SHIFT // shift pmd index into position 161 shr.u r18=r22,PMD_SHIFT // shift pmd index into position 165 dep r17=r18,r29,3,(PAGE_SHIFT-3) // r17=pmd_offset(pud,addr) [all …]
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D | gate.S | 203 mov r18=ar.bspstore 215 extr.u r20=r18,3,6 222 (p8) st8 [r18]=r19 // if bspstore points at RNaT slot, store RNaT there now 246 adds r18=(RNAT_OFF+SIGCONTEXT_OFF),sp 249 ld8 r16=[r18] // get new rnat 250 extr.u r18=r15,3,6 // r18 <- rse_slot_num(bsp0) 268 add r18=r18,r14 // r18 (delta) <- rse_slot_num(bsp0) - rse_num_regs(bspstore1,bsp1) 272 (p7) adds r18=-62,r18 // delta -= 62 274 setf.sig f6=r18 280 add r17=r17,r18 [all …]
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D | relocate_kernel.S | 46 mov r18=ar.rnat 54 mov ar.rnat=r18 69 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base 85 ptc.e r18 87 add r18=r22,r18 90 add r18=r21,r18 99 mov r18=KERNEL_TR_PAGE_SHIFT<<2 101 ptr.i r16, r18 102 ptr.d r16, r18 109 mov r18=IA64_GRANULE_SHIFT<<2 [all …]
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D | fsys.S | 108 1: ld8 r18=[r17] // r18 = current->group_leader->real_parent 111 add r8=IA64_TASK_TGID_OFFSET,r18 // r8 = ¤t->group_leader->real_parent->tgid 126 cmp.ne p6,p0=r18,r19 // did real_parent change? 131 mov r18=0 // i must not leak kernel bits... 134 mov r18=0 // i must not leak kernel bits... 153 add r18=IA64_TASK_CLEAR_CHILD_TID_OFFSET,r16 167 (p6) st8 [r18]=r32 168 (p7) st8 [r18]=r17 172 mov r18=0 // i must not leak kernel bits... 421 RSM_PSR_I(p0, r18, r19) // mask interrupt delivery [all …]
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D | mca_asm.S | 67 ld8 r18=[r2],(O(PTCE_COUNT)-O(PTCE_BASE));; // r18=ptce_base 84 ptc.e r18 86 add r18=r22,r18 89 add r18=r21,r18 100 mov r18=KERNEL_TR_PAGE_SHIFT<<2 102 ptr.i r16, r18 103 ptr.d r16, r18 113 mov r18=IA64_GRANULE_SHIFT<<2 115 ptr.i r16,r18 126 mov r18=IA64_GRANULE_SHIFT<<2 [all …]
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D | minstate.h | 82 (pUStk) mov r18=ar.bsp; \ 97 (pKStk) mov r18=r0; /* make sure r18 isn't NaT */ \ 107 (pUStk) sub r18=r18,r22; /* r18=RSE.ndirty*8 */ \ 115 shl r18=r18,16; /* compute ar.rsc to be used for "loadrs" */ \ 126 st8 [r17]=r18,16; /* save ar.rsc value for "loadrs" */ \ 170 .mem.offset 0,0; st8.spill [r2]=r18,16; \ 175 mov r18=b6; \ 207 st8 [r24]=r18,16; /* b6 */ \ 215 (pUStk) extr.u r17=r18,3,6; \ 216 (pUStk) sub r16=r18,r22; \ [all …]
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D | head.S | 237 mov r18=KERNEL_TR_PAGE_SHIFT<<2 240 mov cr.itir=r18 244 movl r18=PAGE_KERNEL 248 or r18=r2,r18 252 itr.i itr[r16]=r18 254 itr.d dtr[r16]=r18 322 dep r18=0,r3,0,12 324 or r18=r17,r18 337 itr.d dtr[r19]=r18 362 mov r18=PERCPU_PAGE_SIZE [all …]
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D | entry.S | 289 mov.m r18=ar.fpsr // preserve fpsr 359 st8 [r14]=r18 // save fpsr 400 ld8 r18=[r14],16 // restore caller's unat 457 mov ar.unat=r18 // restore caller's unat 706 RSM_PSR_I(p0, r2, r18) // disable interrupts 716 RSM_PSR_I(pUStk, r2, r18) 725 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 727 (p6) ld4 r31=[r18] // load current_thread_info()->flags 734 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13 736 (p6) ld4 r31=[r18] // load current_thread_info()->flags [all …]
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/linux-3.4.99/arch/sh/lib64/ |
D | udivsi3.S | 19 ptabs r18,tr0 31 mulu.l r4,r21,r18 34 shlrd r18,r0,r18 35 mulu.l r18,r22,r20 45 add r18,r19,r18 55 add r18,r19,r18 58 add.l r18,r25,r0
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D | sdivsi3.S | 25 ptabs r18, tr0 31 muls.l r25, r21, r18 /* s2.58 */ 34 sub r19, r18, r18 35 shari r18, 28, r18 /* some 22 bit inverse in s1.30 */ 36 muls.l r18, r25, r0 /* s2.60 */ 37 muls.l r18, r4, r25 /* s32.30 */ 40 muls.l r19, r18, r19 /* s-16.74 */ 42 shari r4, 14, r18 /* s19.-14 */ 44 muls.l r19, r18, r19 /* s15.30 */
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/linux-3.4.99/arch/microblaze/lib/ |
D | umodsi3.S | 30 rsub r18, r5, r6 31 beqi r18, return_here 34 xor r18, r5, r6 35 bgeid r18, 16 39 rsub r18, r5, r6 /* microblazecmp */ 40 bgti r18, return_here 46 addik r18, r0, 0x7fffffff 47 and r5, r5, r18 48 and r6, r6, r18
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D | udivsi3.S | 30 rsub r18, r5, r6 31 beqid r18, return_here 35 xor r18, r5, r6 36 bgeid r18, 16 40 rsub r18, r6, r5 /* microblazecmp */ 41 blti r18, return_here
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/linux-3.4.99/arch/ia64/kvm/ |
D | trampoline.S | 312 dep.z r18=1,61,3; \ 315 mov r17=rr[r18]; \ 316 dep.z r18=2,61,3; \ 319 mov r16=rr[r18]; \ 320 dep.z r18=3,61,3; \ 323 mov r17=rr[r18]; \ 324 dep.z r18=4,61,3; \ 327 mov r16=rr[r18]; \ 328 dep.z r18=5,61,3; \ 331 mov r17=rr[r18]; \ [all …]
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D | optvfault.S | 30 mov r18 = r24; \ 46 mov r24 = r18; \ 124 add r18=VMM_VCPU_ITC_OFS_OFFSET, r21 128 ld8 r18=[r18] 132 add r19=r19,r18 151 add r18=VMM_VCPU_ITC_OFS_OFFSET, r21 158 ld8 r18=[r18] 162 add r19=r19,r18 243 extr.u r18 =r19,2,6 254 cmp.lt p6,p0=14,r18 [all …]
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D | kvm_minstate.h | 43 mov r18 = ar.bsp; \ 107 mov r18 = cr.isr; \ 143 sub r18 = r18,r22; /* r18=RSE.ndirty*8 */ \ 147 shl r18 = r18,16; /* calu ar.rsc used for "loadrs" */\ 156 st8 [r17] = r18,16; /* save ar.rsc value for "loadrs" */\ 211 .mem.offset 0,0; st8.spill [r2] = r18,16; \ 216 mov r18=b6; \ 239 st8 [r24] = r18,16; /* b6 */ \ 247 mov r18 = ar.unat; \ 250 st8 [r19] = r18; /* eml_unat */ \
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D | vmm_ivt.S | 301 mov r18=r0 /* make sure r18 isn't NaT */ 318 shl r18=r18,16 /* compute ar.rsc to be used for "loadrs" */ 327 st8 [r17]=r18,16 /* save ar.rsc value for "loadrs" */ 367 .mem.offset 0,0; st8.spill [r2]=r18,16 372 mov r18=b6 404 st8 [r24]=r18,16 /* b6 */ 642 adds r18=VMM_VPD_BASE_OFFSET,r21 644 ld8 r18=[r18] 646 adds r18=VMM_VPD_VIFS_OFFSET,r18 648 ld8 r18=[r18] [all …]
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/linux-3.4.99/drivers/media/dvb/dvb-usb/ |
D | mxl111sf-gpio.c | 217 u8 r12, r15, r17, r18, r3D, r82, r84, r89; in mxl111sf_config_pin_mux_modes() local 225 ret = mxl111sf_read_reg(state, 0x18, &r18); in mxl111sf_config_pin_mux_modes() 252 r18 |= PIN_MUX_MPEG_PAR_EN_MASK; in mxl111sf_config_pin_mux_modes() 254 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; in mxl111sf_config_pin_mux_modes() 280 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; in mxl111sf_config_pin_mux_modes() 282 r18 |= PIN_MUX_MPEG_SER_EN_MASK; in mxl111sf_config_pin_mux_modes() 308 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; in mxl111sf_config_pin_mux_modes() 310 r18 &= ~PIN_MUX_MPEG_SER_EN_MASK; in mxl111sf_config_pin_mux_modes() 336 r18 &= ~PIN_MUX_MPEG_PAR_EN_MASK; in mxl111sf_config_pin_mux_modes() 338 r18 |= PIN_MUX_MPEG_SER_EN_MASK; in mxl111sf_config_pin_mux_modes() [all …]
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/linux-3.4.99/arch/ia64/hp/sim/boot/ |
D | boot_head.S | 119 add r18=8,r29 /* second index */ 122 st8 [r18]=r0,16 /* clear remaining bits */ 125 st8 [r18]=r0,16 /* clear remaining bits */ 128 st8 [r18]=r0,16 /* clear remaining bits */ 132 st8 [r18]=r0,16 /* clear remaining bits */ 136 st8 [r18]=r0,16 /* clear remaining bits */ 139 st8 [r18]=r0,16 /* clear remaining bits */ 142 st8 [r18]=r0,16 /* clear remaining bits */ 145 st8 [r18]=r0,16 /* clear remaining bits */
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/linux-3.4.99/arch/ia64/include/asm/xen/ |
D | minstate.h | 70 (pUStk) mov r18=ar.bsp; \ 85 (pKStk) mov r18=r0; /* make sure r18 isn't NaT */ \ 97 (pUStk) sub r18=r18,r22; /* r18=RSE.ndirty*8 */ \ 108 shl r18=r18,16; /* compute ar.rsc to be used for "loadrs" */ \ 119 st8 [r17]=r18,16; /* save ar.rsc value for "loadrs" */ \
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/linux-3.4.99/arch/microblaze/kernel/ |
D | entry-nommu.S | 86 swi r18, r1, PT_R18 176 lwi r18, r1, PT_R18 238 swi r18, r1, PT_R18 328 swi r18, r1, PT_R18 400 swi r18, r11, CC_R18 454 lwi r18, r11, CC_R18 508 lwi r18, r1, PT_MODE 509 swi r18, r0, PER_CPU(KM) 512 lwi r18, r1, PT_FSR 513 mts rfsr, r18 [all …]
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/linux-3.4.99/arch/ia64/lib/ |
D | xor.S | 74 mov r18 = in3 85 (p[0]) ld8.nta s3[0] = [r18], 8 114 mov r18 = in3 125 (p[0]) ld8.nta s3[0] = [r18], 8 157 mov r18 = in3 169 (p[0]) ld8.nta s3[0] = [r18], 8
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/linux-3.4.99/arch/powerpc/kvm/ |
D | booke_interrupts.S | 141 stw r18, VCPU_GPR(r18)(r4) 225 lwz r18, VCPU_GPR(r18)(r4) 263 stw r18, VCPU_GPR(r18)(r4) 283 lwz r18, HOST_NV_GPR(r18)(r1) 328 stw r18, HOST_NV_GPR(r18)(r1) 348 lwz r18, VCPU_GPR(r18)(r4)
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D | book3s_interrupts.S | 46 PPC_LL r18, VCPU_GPR(r18)(vcpu); \ 138 PPC_STL r18, VCPU_GPR(r18)(r7)
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/linux-3.4.99/arch/unicore32/lib/ |
D | copy_page.S | 29 mov r18, r1 33 ldm.w (r0 - r15), [r18]+
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/linux-3.4.99/arch/sh/kernel/cpu/sh5/ |
D | entry.S | 266 st.q SP, SAVED_R18, r18 309 st.q SP, SAVED_R18, r18 318 gettr tr4, r18 323 st.q SP, TLB_SAVED_TR4 , r18 346 ld.q SP, TLB_SAVED_TR4, r18 352 ptabs r18, tr4 361 ld.q SP, SAVED_R18, r18 380 ld.q SP, TLB_SAVED_TR4, r18 389 ptabs/u r18, tr4 428 st.q SP, SAVED_R18, r18 [all …]
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