Searched refs:plltype (Results 1 – 7 of 7) sorted by relevance
| /linux-3.4.99/drivers/ssb/ |
| D | driver_chipcommon.c | 319 u32 *plltype, u32 *n, u32 *m) in ssb_chipco_get_clockcpu() argument
322 *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_get_clockcpu()
323 switch (*plltype) { in ssb_chipco_get_clockcpu()
342 u32 *plltype, u32 *n, u32 *m) in ssb_chipco_get_clockcontrol() argument
345 *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_get_clockcontrol()
346 switch (*plltype) { in ssb_chipco_get_clockcontrol()
451 u32 plltype; in ssb_chipco_serial_init() local
457 plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); in ssb_chipco_serial_init()
460 if (plltype == SSB_PLLTYPE_1) { in ssb_chipco_serial_init()
462 baud_base = ssb_calc_clock_rate(plltype, in ssb_chipco_serial_init()
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| D | main.c | 980 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m) in ssb_calc_clock_rate() argument
987 switch (plltype) { in ssb_calc_clock_rate()
1011 switch (plltype) { in ssb_calc_clock_rate()
1027 switch (plltype) { in ssb_calc_clock_rate()
1033 if ((plltype == SSB_PLLTYPE_1) || in ssb_calc_clock_rate()
1034 (plltype == SSB_PLLTYPE_3)) in ssb_calc_clock_rate()
1078 u32 plltype; in ssb_clockspeed() local
1085 ssb_extif_get_clockcontrol(&bus->extif, &plltype, in ssb_clockspeed()
1088 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype, in ssb_clockspeed()
1096 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); in ssb_clockspeed()
[all …]
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| D | ssb_private.h | 179 extern u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m);
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| /linux-3.4.99/include/linux/ssb/ |
| D | ssb_driver_extif.h | 169 u32 *plltype, u32 *n, u32 *m);
203 u32 *plltype, u32 *n, u32 *m) in ssb_extif_get_clockcontrol() argument
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| D | ssb_driver_chipcommon.h | 617 u32 *plltype, u32 *n, u32 *m);
619 u32 *plltype, u32 *n, u32 *m);
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| /linux-3.4.99/drivers/gpu/drm/nouveau/ |
| D | nouveau_hw.c | 426 nouveau_hw_get_pllvals(struct drm_device *dev, enum pll_types plltype, in nouveau_hw_get_pllvals() argument
430 uint32_t reg1 = get_pll_register(dev, plltype), pll1, pll2 = 0; in nouveau_hw_get_pllvals()
461 ret = get_pll_limits(dev, plltype, &pll_lim); in nouveau_hw_get_pllvals()
481 nouveau_hw_get_clock(struct drm_device *dev, enum pll_types plltype) in nouveau_hw_get_clock() argument
486 if (plltype == PLL_MEMORY && in nouveau_hw_get_clock()
496 if (plltype == PLL_MEMORY && in nouveau_hw_get_clock()
504 ret = nouveau_hw_get_pllvals(dev, plltype, &pllvals); in nouveau_hw_get_clock()
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| D | nouveau_hw.h | 43 int nouveau_hw_get_pllvals(struct drm_device *, enum pll_types plltype,
46 int nouveau_hw_get_clock(struct drm_device *, enum pll_types plltype);
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