Searched refs:pll_reset (Results 1 – 7 of 7) sorted by relevance
123 u8 pll_reset; member
397 reg_910 = (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset; in dib7000m_reset_pll()433 (1 << 3) | (bw->pll_range << 1) | (bw->pll_reset << 0); in dib7000mc_reset_pll()
438 …dib7000p_write_word(state, 1856, (!bw->pll_reset << 13) | (bw->pll_range << 12) | (bw->pll_ratio <… in dib7000p_reset_pll()452 …bw->pll_prediv << 5) | (((bw->pll_ratio >> 6) & 0x3) << 3) | (bw->pll_range << 1) | bw->pll_reset); in dib7000p_reset_pll()
647 (pll->pll_reset << 0); in dib8000_reset_pll()671 dib8000_write_word(state, 1856, (!pll->pll_reset<<13) | in dib8000_reset_pll()
682 u32 pll_reset : 1; member
1075 w100_pwr_state.pll_cntl.f.pll_reset = 0x0; /* not reset */ in w100_pll_adjust()1249 w100_pwr_state.pll_cntl.f.pll_reset = 0x1; in w100_pwm_setup()
997 .pll_reset = 1,